D/A Conversion system with compensation circuit

A D/A conversion system comprising:

• input means for applying a digital signal composed of n upper bits and m lower bits as an input to the system;
• a D/A converter for converting the digital input signal applied from said input means into an analog signal;
• output means for receiving the analog signal applied from said D/A converter to provide an analog output signal of the system;
• memory means for storing a compensation data, used for the compensation of non-linearities inherent in the D/A converter by compensation of the analog signal appearing from said output means, at an address corresponding to the upper bit portion of the digital input signal;
• adder means for adding the compensation data, read out from said memory means at the address corresponding to the upper bit portion of the digital input signal applied from said input means and the lower bit portion of the digital input signal;
• and
• signal applying means for applying the output signal of said adder means representing the result of addition to said D/A converter together with the upper bit portion of the digital input signal, and further comprising
• an A/D converter for converting the analog signal appearing from said output means into a digital signal when said adder means is rendered non-operative, and arithmetic means for computing the difference between the digital input signal applied from said input means and the digital signal appearing from said A/D converter and applying the difference signal to the address of said memory means specified by the upper bit portion of the digital input signal.