Method of making integrated circuits
AssigneeGeneral Electric Company
InventorMario Ghezzo
Life of this patent
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Abstract
A method of reducing lateral field oxidation in the vicinity of the active regions of integrated circuits is described. The method utilizes a three layered masking structure for masking the active regions during field oxidation including a first very thin layer of silicon nitride in contact with the active region of the substrate, a second thin layer of silicon dioxide overlying the very thin layer of silicon nitride, and a third thick layer of silicon nitride overlying the second layer of silicon dioxide.
Claims5
The method of providing in a substrate of silicon semiconductor material having a major surface, a thick layer of silicon dioxide contiguous to a region of said substrate adjacent said major surface comprising:
- providing said substrate of silicon semiconductor material having said major surface,
- forming a first thin layer of silicon nitride on said major surface,
- forming a second thin layer of silicon dioxide on said layer of silicon nitride,
- forming a third layer of silicon nitride on said second layer of silicon dioxide,
- patterning said third layer of silicon nitride to produce a retained portion overlying and in registry with said region on said major surface,
- patterning said second layer of silicon dioxide to produce a retained portion overlying and in registry with said region on said major surface,
- patterning said first layer of silicon nitride to produce a retained portion overlying and in registry with said region on said major surface,
- heating said substrate in an oxidizing atmosphere to a temperature and for a time to cause the silicon semiconductor material contiguous to said region to be converted to silicon dioxide.
Dependencies are inferred from the claim text.