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US 4,323,981 AGranted
Central processing unit with improved ALU circuit control
AssigneeTokyo Shibaura Denki Kabushiki Kaisha
InventorNorimitsu Nakamura
Life of this patent
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Abstract
An information processor is provided with a plurality of ALU chips under control of a microprogram and an ALU control circuit for controlling the ALU chips. The ALU control circuit responds to data bus information given thereto to select an ALU chip from which flag data is outputted. The ALU control circuit controls the ALU chip specified by the data bus information to operate it. When a carry is produced in the selected ALU chip, a carry generator is so controlled to produce a given carry signal toward a given ALU chip.
Claims15
An information processor for performing processing operations upon externally supplied data including control data under the control of a microprogram comprising:
- a read only memory for storing microprograms at associated execution addresses, each said microprogram comprising a set of processing instructions;
- a microprogram sequencer connected to said read only memory for producing the execution address of a said stored microprogram and for controlling said read only memory to output said instructions comprising said microprogram associated with said produced execution address;
- a read only memory data register connected to said read only memory for latching the instructions outputted from said read only memory;
- a data bus for receiving said data including said control data;
- a register file connected to said data bus for receiving data including said control data therefrom;
- an arithmetic/logic unit comprising a plurality of ALU chips of a selected bit length connected to said read only memory data register for receiving said outputted instructions and to said register file for receiving data from said register file and for performing processing operations on said data received from said register file in response to said instructions received from said read only memory data register, each of said ALU chips having associated therewith flag data including a carry flag signal, a sign flag signal, a zero flag signal, and an overflow flag signal for indicating the status of said associated ALU chip;
- and
- ALU circuit control means connected to said arithmetic/logic unit and said data bus for selecting ALU chips in accordance with said instructions latched in said read only memory data register so as to carry out said processing operations on said data provided by said register file in accordance with said instructions of said latched microprogram, wherein each of said performed operations is constituted of bits the number of which is defined by the selected ALU chips, said ALU circuit control means for selecting said carry flag signal, said sign flag signal, said zero flag signal, and said overflow flag signal associated with one of said selected ALU chips in accordance with said received data to indicate the status of said arithmetic/logic unit.
5 more elements
An information processor for performing processing operations on externally supplied data including control data under the control of a microprogram comprising:
- a read only memory for storing microprograms at associated execution addresses, each of said microprograms comprising a set of processing instructions;
- a microprogram sequencer connected to said read only memory for producing the execution address of a said stored microprogram, and for controlling said read only memory to output said instructions comprising said microprogram associated with said produced execution address;
- a read only memory data register connected to said read only memory for latching the instructions outputted from said read only memory;
- a data bus for receiving said externally supplied data including said control data;
- a register file connected to said data bus for storing said data received by said data bus including said control data;
- first and second ALU groups each comprised of a plurality of ALU chips of predetermined bit widths, each said ALU chip being connected to said read only memory data register and said register file and having associated therewith flag data including a carry flag signal, a sign flag signal, a zero flag signal, and an overflow flag signal for indicating the status of said ALU chips, said first and second ALU groups for performing processing operations on said data received from said register file in accordance with said instructions of said microprogram latched in said read only memory data register;
- and
- ALU circuit control means connected to said first and second ALU groups and said data bus for selecting among said first and second ALU groups in accordance with said instructions latched in said read only memory data register to carry out said processing operations on said data provided by said register file wherein each operation is constituted of bits the number of which is defined by the bit widths of said ALU chips included in said selected groups of ALU chips, said ALU circuit control means for selecting among said flag data associated with said ALU chips in said selected ALU group to indicate the status thereof.
5 more elements
Dependencies are inferred from the claim text.