High performance semiconductor package assembly

A package assembly for interconnecting a plurality of integrated circuit semiconductor devices having a multi-layer dielectric material substrate with a signal fan-out wiring pattern and internal wiring metallurgy interconnecting the semiconductor devices, a plurality of integrated circuit semiconductor devices supported on the top surface of the substrate in electrically connected operative relation, and external signal and power connection means, the improvement comprising

• a power supply distribution system for connecting electrical supply voltages to said devices from power connection means comprised of radial waveguide structure with parallel waveguide planes with a low input impedence, said waveguide planes located between said signal fan-out wiring pattern and the said internal wiring metallurgy in said substrate, vertical vias connecting said waveguide planes to said devices and external connection means, said waveguide planes connected in common to all of said plurality of devices.