High-voltage circuit for insulated gate field-effect transistor

A high-voltage MOSFET (insulated gate field-effect transistor) circuit wherein n MOSFETs are connected in series by electrically connecting a drain of the m-th (1.ltoreq.m.ltoreq.n-1) MOSFET and a source of the (m+1)-th MOSFET, a source and gate of the first MOSFET being respectively used as a source terminal and gate terminal of the MOSFET circuit, a drain of the n-th MOSFET being used as a drain terminal of the MOSFET circuit, and wherein divided voltages obtained by dividing a voltage applied across the source and drain terminals, by means of a first voltage divider circuit in which a plurality of resistors are connected in series are applied to gates of the second to n-th MOSFETs;

• the high-voltage MOSFET circuit being characterized by comprising means for applying bias voltages from a bias voltage supply to the respective gates of said second to n-th MOSFETs, wherein said bias voltage supply means is connected to said gates through rectifiers.

A high-voltage MOSFET (insulated gate field-effect transistor) circuit wherein n MOSFETs are connected in series by electrically connecting a drain of the m-th (1.ltoreq.m.ltoreq.n-1) MOSFET and a source of the (m+1)-th MOSFET, a source and gate of the first MOSFET being respectively used as a source terminal and gate terminal of the MOSFET circuit, a drain of the n-th MOSFET being used as a drain terminal of the MOSFET circuit, and wherein divided voltages obtained by dividing a voltage applied across the source and drain terminals, by means of a first voltage divider circuit in which a plurality of resistors are connected in series are applied to gates of the second to n-th MOSFETs;

• the high-voltage MOSFET circuit being characterized by comprising means for applying bias voltages from a bias voltage supply to the respective gates of said second to n-th MOSFETs, wherein said means for applying bias voltages is a circuit which divides a voltage fed from a bias voltage supply terminal, by means of a second voltage divider circuit with a plurality of resistors connected in series and which applies the divided voltages to said respective gates as said bias voltages.

A high-voltage MOSFET (insulated gate fieldeffect transistor) circuit wherein n MOSFETs are connected in series by electrically connecting a drain of the m-th (1.ltoreq.M.ltoreq.n-1) MOSFET and a source of the (m+1)-th MOSFET, a source and gate of the first MOSFET being respectively used as a source terminal and gate terminal of the MOSFET circuit, a drain of the n-th MOSFET being used as a drain terminal of the MOSFET circuit, and wherein divided voltages obtained by dividing a voltage applied across the source and drain terminals, by means of a first voltage divider circuit in which a plurality of resistors are connected in series are applied to gates of the second to n-th MOSFETs;

• the high-voltage MOSFET circuit being characterized by comprising means for applying bias voltages from a bias voltage supply to the respective gates of said second to n-th MOSFETs, wherein an impedance element having a threshold value is inserted between the adjacent resistors of said first voltage divider circuit, whereby said bias voltages are applied to said respective gates of said second to n-th MOSFETS.