Video signal time base error correction circuit

A system for the correction of time base errors in video signals reproduced from a rotating record carrier, said reproduced video signals including burst signals and horizontal sync signals, said system comprising:

• time base error correction means, including a variable delay line means, for receiving said reproduced video signals and for correcting time base errors in said video signals in response to a control signal, the output of said delay line means comprising corrected video signals;
• a reference frequency generator circuit for generating a reference frequency signal;
• phase detection means, including a phase detector circuit having first and second inputs and providing an output in accordance with a phase difference between said first and second inputs, for receiving said corrected video signals and said reference frequency signal and producing output signals in response to phase differences between said burst signals and said reference frequency signal;
• horizontal sync means for providing an output corresponding to said horizontal sync signals and said video signals;
• dividing means for frequency dividing said reference frequency signal to provide a second reference frequency signal;
• second phase comparison means, including a second phase detector having first and second inputs and providing an output in accordance with a phase difference between said first and second inputs, for receiving the outputs of said horizontal sync means and said dividing means and providing an output signal in response to a phase difference therebetween;
• dropout detecting means for detecting a dropout in the output of said second phase detector due to a dropout of said horizontal sync signals, and for providing an output signal during the occurrence of a dropout;
• dropout compensating circuit means for correcting, in accordance with the output of said dropout detecting circuit, variations in the output of said second phase comparison means due to dropout;
• and
• an adder circuit for summing the outputs of said first phase comparison means and said dropout compensating circuit means, an output of said adder circuit comprising said control signal to said time base error correction means.