Channel programming apparatus for a signal receiver

Programming apparatus for a signal receiver of the type having a tuner whose frequency is determined by a tuning control signal, and a power supply having an ON and an OFF condition and which can be switched from one to the other of said ON and OFF conditions in response to a power control signal, the programming apparatus comprising:

• tuner control means for generating said tuning control signal when said power supply is switched to said ON condition, said tuning control signal having a predetermined characteristic for representing the frequency of the tuner;
• timing means for generating a current time code representing the current time;
• first input means for selectively generating a program time code representing a desired program time;
• first memory means for storing said program time code;
• coincidence detector means for comparing the current time code with the program time code stored in said first memory means and providing a coincidence signal when said current time code and the stored program time code bear a predetermined relation to one another;
• means for applying said power control signal to said power supply to switch it into one of said ON and OFF conditions in response to an occurrence of said coincidence signal;
• second input means for selectively generating a program channel code corresponding to a desired frequency;
• second memory means for storing said program channel code;
• means providing a discriminating signal indicating the stored presence of said program channel code in said second memory means;
• means for supplying said program channel code from said second memory means to said tuner control means so that said tuning control signal has said characteristic determined for tuning said tuner to the desired frequency at the desired program;
• and
• logic circuit means coupled to received said coincidence signal and said discriminating signal and permitting said tuner control means to receive said program channel code only upon occurance of both said coincidence signal and said discriminating signal at input terminals of said logic circuit means.