Computer input/output arrangement for enabling a simultaneous read/write data transfer

A computer input/output interface for a computer arrangement, said interface communicating data between said computer arrangement and connected peripheral equipment, said computer arrangement including a shift register means for inputting and outputting data, a data memory means having first and second part connected to a first and second part respectively of said shift register, said computer arrangement operable under rotate command means, said rotate command means having a read phase for reading data from an addressed data memory means into said register means, a rotate phase for rotating said data in said register means a fixed number of bits and a write phase for writing said word into said addressed memory means from said register means

• characterized in that
• said input/output interface includes
• a transmit device for controlling data from said first part of said register means to said peripheral equipment,
• a receive device for inputting data from said peripheral equipment to first part of said register means and
• selecting means for controlling the read and write operation of said receive device, said transmit device and first part of said data memory means and operable under computer control in executing a selected rotate command to a predetermined addressed data memory means, said selecting means including
• read enabling means operable during a read phase of an executing selected rotate command for enabling a data read from said receive device into said first part of said register means,
• read disabling means operable concurrently with said read enabling means for disabling a data read from said first part of said predetermined addressed memory means into said first part of said register means,
• write enabling means operable during a write phase of an executing selected rotate command for enabling a data write from said first part of said register means into said transmit device, and
• write disabling means operable concurrently with said write enabling means for disabling a data write from said first part of said register means into said first part of said predetermined addressed memory means.

A data communication arrangement for interfacing a communication system with a burst data operated key telephone station set which simultaneously transmits serial binary bit status information to and receives serial binary bit control signals from said communication system, said system having a reading and writing data rate faster than the average data rate of said station set but incapable of reading and writing at said burst data rate of said station set, said system capable of performing a rotate memory instruction faster than said corresponding burst data rate of said station set,

• said communication system including a control means operating under program control, a data word memory means having word storage split into a first and a second independently accessible parts and a rotate means operable under program control having a read phase for reading the contents of the first and second parts of a data memory location of said data memory means into a first and a second part of a shift register respectively, a rotate phase for rotating the contents of said register a fixed number of bits and a writing phase for writing said register contents into said data memory location
• characterized in that
• said communication arrangement includes
• a receive device connected to said first part of said register and arranged to receive serial binary bit data from said key station set;
• a transmit device connected to said first part of said register and arranged to transmit serial binary bit data to said key station set;
• a read selecting means operable during a read phase of a rotate means operation on a preselected data memory location for selectively reading into said first part of said register a data bit from said receive device rather than reading a data bit from a first part of said preselected data memory location while said rotate means simultaneously reads data from a second part of said preselected data memory location into said second part of said register;
• said rotate means operative during said rotate phase of said preselected rotate means operation for rotating the received data bit located in said first part of said register into said second part of said register while simultaneously rotating a transmit data bit from said second part of said register into said first part of said register and
• a write selecting means operable during said write phase of said preselected rotate means operation for selectively writing said transmit data bit from said first part of said register into said transmit device rather than writing said transmit bit into said first part of said preselected data memory location while said rotate means simultaneously writes data into said second part of said preselected data location from said second part of said register.