Apparatus and method for next address generation in a data processing system

In a data processing system including a control store with program instructions stored therein, means for accessing said instructions to enable execution thereof to control the operation of said system, and a save register, the method of operating said system comprising the steps of:

• A. executing a save return address instruction in which the binary encoded address of the next instruction within said control store is stored in said save register as a saved address;
• B. executing said next instruction to branch from a first program to a second program;
• C. executing a return after subroutine (RAS) instruction to restore operation of said first program, the execution of said RAS instruction including the reading of said saved address to supply an entry address for said first program;
• and
• D. inverting a portion of said saved address as said address is read during execution of said RAS instruction to generate said entry address.

In a data processing system including a control store with program instructions stored therein, means for accessing said instructions to enable execution thereof to control the operation of said system, and a save register, the method of operating said system comprising the steps of:

• A. executing a save return address instruction in which a multi-bit signal representing the binary encoded address of an instruction within said control store is stored in said save register;
• B. executing a branching instruction to branch from a first program to a second program;
• and
• C. executing a return instruction to restore operation of said first program, the execution of said return instruction including the reading of said signal stored in said save register to supply to said accessing means an entry address for said first program, said entry address being formed from a multi-bit signal representing the address of said branching instruction by passing a portion of said branching instruction address signal through an inverting circuit.