Single step system for a microcomputer

A method of debugging a program in a microcomputer having memory storage means, storage location for a single step routine, visual display means, a processor and providing a load instruction signal indicating an instruction has been loaded into the processor, comprising:

• switching data from the storage location to the processor in place of having data flow from the memory storage means to the processor, the switching data taking place upon occurrence of trailing edge of the load instruction;
• storing contents from preselected registers of the processor into a stack;
• displaying contents of the preselected registers from the stack to the visual display means;
• reloading the contents from the stack to the preselected registers;
• and decrementing the program counter by one so that the processor can continue with the next instruction in sequence.

A system useful in combination with a microcomputer for debugging a program, the microcomputer having a memory, a display means, and a processor providing a load instruction signal and having an input bus, comprising:

• a latch means coupled to the instruction load signal and being triggered by the load instruction signal;
• a programmable read only memory having an output bus;
• a switching means coupled to the latch means so that the latch means can control the switching means, the switching means switching the input bus from the memory to the programmable read only memory;
• and decoding means coupled to the output bus and providing an output coupled to the latch means to reset the latch means upon occurrence of the last instruction stored in the programmable read only memory.