Multiprocessor parcel postage metering system having serial data bus
AssigneePitney Bowes Inc.
InventorDaniel F. Dlugos
Life of this patent
Estimating the term…
Loading patent…
AssigneePitney Bowes Inc.
InventorDaniel F. Dlugos
Estimating the term…
A multiprocessor parcel postage metering system includes a system processor to which a scale subsystem processor, a postage printing subsystem processor and a peripherals subsystem processor may be connected. The processors share a common data bus over which data is transferred serially. The system processor accepts weight and status data transmitted from the scale subsystem processor over the serial data bus. The system processor operates on this data and keyboard entry data to calculate required postage as a function of parcel origin, parcel destination, class of service and selected special fees. Printer setting data is transferred to the postage printing subsystem processor over the serial data bus. Peripheral devices, such as a document printer or a parcel identification number counter, are controlled by data sent to the peripherals subsystem processor over the serial data bus. Communications are controlled by the system processor which initiates any interprocessor data transfer by means of a control signal which is interpreted by the addressed subsystem processor as a demand for information.
For controlling the transfer of data between processors in a multiprocessor system, a bus control system including:
For controlling the transfer of data between processors in a multiprocessor system wherein one of the processors is a system processor, a data control system comprising:
For controlling the transfer of data in a multiprocessor postage metering system including a system processor for a scale subsystem processor for providing scale weight and status data and a postage printing subsystem processor for accepting postage printer setting data and for providing printer status data, wherein each of said processors is capable of being a data transmitting processor or a data receiving processor at a given time, a data control system comprising:
Dependencies are inferred from the claim text.