Direct-coupled amplifier circuit with DC output offset regulation
AssigneeNippon Gakki Seizo Kabushiki Kaisha
InventorMasaru Ida
Life of this patent
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Abstract
A direct-coupled amplifier circuit includes an input stage differential amplifier comprised of a differential pair of field effect transistors and a pair of bipolar transistors connected in series with the differential field effect transistors, respectively and having their emitters coupled together. Gate electrodes of the differential field effect transistors are coupled to an input terminal and an output terminal of the amplifier circuit, respectively. The collector-to-emitter voltages of the bipolar transistors are controlled in accordance with the magnitude and polarity of an output DC offset voltage appearing on the output terminal so as to reduce the DC offset voltage.
Claims6
A direct-coupled amplifier circuit having an input terminal to receive an input signal and an output terminal to be coupled to a load, comprising:
- an input stage differential amplifier including a differential pair of first and second transistors each having a control electrode and first and second electrodes defining a conduction path therebetween, said control electrode of said first transistor being coupled to said input terminal and said control electrode of said second transistor being coupled to said output terminal through a negative feedback network, and third and fourth transistors having their control electrodes, first and second electrodes defining conduction paths therebetween connected in series with said conduction paths of said first and second transistors, respectively, the second electrodes of said third and fourth transistors being coupled together to a constant current source for maintaining the currents flowing in said conduction paths of said first and second transistors constant;
- an offset detection circuit for detecting the magnitude and polarity of an output DC offset appearing on said output terminal;
- and
- a DC offset regulation circuit for controlling only said output DC offset, said offset regulation circuit being coupled to said offset detection circuit and to the control electrodes of said third and fourth transistors for controlling voltages across said conduction paths of said third and fourth transistors as a function of the magnitude and polarity of said output DC offset detected by said offset detection circuit to thereby control said output DC offset.
A direct-coupled amplifier circuit having an input terminal to receive an input signal and an output terminal to be coupled to a load, comprising:
- a differential amplifier including a differential pair of first and second field effect transistors each having a gate electrode, drain electrode and source electrode defining a conduction path therebetween, said gate electrode of said first field effect transistor being coupled to said input terminal and said gate electrode of said second field effect transistor being coupled to said output terminal through a negative feedback network, and third and fourth bipolar transistors having their collector-emitter paths connected in series with said conduction paths of said first and second transistors, respectively, and their emitters coupled together to a constant current source for maintaining the currents flowing in said conduction paths of said first and second field effect transistors constant;
- and
- circuit means coupled to said output terminal and to the bases of said third and fourth bipolar transistors for controlling collector-to-emitter voltages of said third and fourth bipolar transistors as a function of the magnitude and polarity of an output DC offset on said output terminal, to thereby control only said output DC offset.
Dependencies are inferred from the claim text.