Bias control for transistor circuits incorporating substrate bias generators

Control circuitry for limiting bias voltage levels at the substrate of a transistor circuit chip, said control circuitry comprising:

• sensing circuitry means responsive to variations in the circuit chip supply voltage level and to the chip substrate bias voltage level for producing an output signal corresponding to said supply voltage level whenever said bias voltage exceeds a predetermined level for a particular level of said supply voltage;
• a switching transistor in series with a resistance coupled between a bias voltage conductor and ground reference, said switching transistor being responsive to the occurrence of said output signal for coupling said conductor with said ground reference;
• and
• a resistive element coupled between said bias voltage conductor and the control element of said switching transistor for maintaining said transistor in a normally non-conductive state in the absence of said output signal.