Memory control circuit for a television receiver
AssigneeSony Corporation
InventorHiroshi Yasuda
Life of this patent
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Abstract
In an electronic radio frequency tuner of the type having a source of digital signals representing radio frequencies to which the tuner is tuned and an addressable memory, a memory control circuit includes an addressing circuit having an operative state for selectively providing address-identifying signals which select respective addresses of the memory, a write-in control circuit for writing a digital signal into a selected address of the memory, a further memory for selectively memorizing one of the digital signals from the source and one of the address-identifying signals from the addressing circuit, and a switching circuit for selectively supplying one of the digital signals or one of the address-identifying signals to the further memory in accordance with the state of the addressing circuit.
Claims11
In an electronic radio frequency tuner having a source of digital signals representing radio frequencies to which the tuner is selectively tuned, and an addressable memory with a plurality of addresses for storing specific ones of said digital signals;
- a memory control circuit comprising:
- addressing means having an inoperative state and an operative state for selectively providing address-identifying signals which select respective addresses of said memory;
- write-in means for writing a digital signal from said source into the selected address of said memory;
- an additional memory for selectively memorizing either a digital signal from said source or an address-identifying signal from said addressing means;
- and
- switching means for determining, in response to the state of said addressing means, which of said digital signal and said address-identifying signal is supplied to said additional memory.
Dependencies are inferred from the claim text.