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US 4,306,194 AGranted
Data signal detection circuit
AssigneeInternational Business Machines Corporation
InventorDale B. Chapman
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Abstract
A readout signal detection circuit comprises a data signal detector which senses changes in voltage of the signal waveform relative to signal peak amplitude; a threshold detector for sensing signal peak magnitudes that exceed a preset magnitude; a differentiator to locate signal peak position; and logic circuitry to test the validity of a linear readout signal applied to the detectors and the differentiator in parallel. A ramp timer provides a delay and fixed period during which the readout signal is checked for validity.
Claims7
A readout signal detection circuit comprising:
- input means for supplying a differential linear readout signal;
- means coupled to said input means for detecting peak voltages of said readout signal, and changes in amplitude relative to said peak voltages;
- threshold detecting means coupled to said input means for sensing voltages of said readout signal;
- differentiator means for detecting the sign of the slopes and the occurrence of peak voltages of said readout signal, coupled to said input means;
- logic circuit means coupled to said threshold detecting means and said differentiator means and said peak voltage detecting means for sampling the processed readout signal to separate valid signal peaks from spurious signals;
- and
- resettable timing means for delineating the period when valid signal pulses may be passed.
4 more elements
Dependencies are inferred from the claim text.