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US 4,306,163 AGranted
Programmable single chip MOS computer
AssigneeIntel Corporation
InventorsHenry M. Blume, Jr., David A. Stamm, David L. Budde
Life of this patent
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Abstract
A buffer utilizing MOS devices for coupling a computer input data line and a computer output data line to a single input/output port is disclosed. The buffer receives a control signal generated by computer port control means at the beginning of any buffer cycle when data is to be accepted by the buffer.
Claims9
In an MOS computer, a buffer means for coupling a computer input data line and a computer output data line to a single computer port means where a control signal is generated by computer port control means at the beginning of each buffer cycle comprising:
- a first MOS device coupling said port means to a source of potential;
- a second MOS device coupled to said port means for selectively coupling said port means to such source of potential, the gate of said second MOS device being coupled to said control signal;
- a third MOS device coupled to said port means for selectively discharging said port means, the gate of said third MOS device being coupled to said computer output data line;
- said computer output data line being coupled to the gate of said second MOS device, and said computer input data line being coupled to said port means,
- whereby said port means has the characteristics of a bidirectional data port means.
2 more elements
Dependencies are inferred from the claim text.