Key input circuit
AssigneeSony Corporation
InventorTakao Mogi
Life of this patent
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Abstract
A key input circuit includes a matrix array of key switches, a scanning signal generator, and an output circuit that provides a key output signal, whenever any of the key switches is depressed, as an indication of the key switch that is so depressed. The key input circuit also includes a gating circuit for selectively enabling the scanning signal generator so that the latter only supplies a scanning signal to the key switches if one of the key switches is depressed, and ceases to supply the scanning signal when all of the key switches are released, thereby eliminating the unnecessary generation of the scanning signal as a source of signal interference.
Claims6
A key input circuit comprising a plurality of key switches each actuable between a first and a second condition, said key switches being arranged in a matrix array;
- scanning signal generating means for supplying a scanning signal to said matrix array of key switches during a scanning operation and supplying a DC level thereto other than during the scanning operation;
- key output means for providing a key output signal, in response to reception of said DC level, whenever one of said key switches is actuated from its first to its second condition, the key output signal being indicative of the key switch that is so actuated;
- and gating means for selectively enabling said scanning signal generating means so that the latter supplies said scanning signal to said matrix array in response to an actuation of any one of said key switches to its second condition, and said scanning signal generating means ceases to supply said scanning signal to said matrix array in response to a return of said one key switch to its first condition.
Dependencies are inferred from the claim text.