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US 4,305,010 AGranted
Excessive duty cycle and pulse width limiter
AssigneeThe United States of America as represented by the Secretary of the Army
InventorPhilip S. Wise
Life of this patent
Estimating the term…
Abstract
An excessive duty cycle and pulse width limiter comprises two constant cunt sources responsive to changes in a control input signal to provide a constant voltage charge and discharge current to a capacitor whose voltage level is sensed by a tripping circuit. The circuit effectively measures duty cycle and is used as a protective limiter, providing output pulse blanking signals to load circuitry.
Claims5
An excessive duty cycle and pulse width limiter comprising:
- a drive control circuit having an input and an output, said input being adapted for receiving a control input signal, a first constant current means having an input coupled to receive the output of said drive control circuit and having an output, a second constant current means having an input adapted to receive the output of said drive control circuit and having an output coupled to the output of said first constant current means, and a trip circuit having an input adapted to receive the outputs from said constant current means and having a load output adapted for changing signal levels supplied to a load, said trip circuit comprises a duty cycle averaging element adapted to receive the outputs of said constant current means, an input amplifier responsive to signals developed across said duty cycle averaging element, a trip circuit level detector having an input responsive to said input amplifier, and an output amplifier responsive to said level detector for controlling the voltage output of said trip circuit.
Dependencies are inferred from the claim text.