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US 4,302,808 AGranted
Multilevel interrupt handling apparatus
AssigneeHoneywell Information Systems Italia
InventorsVittorio Zanchi, Tiziano Maccianti
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AssigneeHoneywell Information Systems Italia
InventorsVittorio Zanchi, Tiziano Maccianti
Estimating the term…
An interrupt handling apparatus for a data processing system comprising a plurality of processing units and a working memory to which the units may access through a common bus by means of multilevel priority or access requests. Access requests are forwarded by each unit to a bus access controller preferably made part of the working memory through a single lead for each unit, irrespective of the access request priority level; and if the priority level of an access request is high, a high priority level access request signal is distributed by the high priority level interrupting unit to the other system units, which mask their possible access request of a lower priority level in response to such signal. The bus access controller grants access to a unit at a time on a priority basis determined by a priority network in the controller totally insensitive to any priority level difference of the access requests.
In a data processing system including (A) a plurality of units coupled together with one BUS to which each unit may access through an access request and (B) a BUS access control unit coupled to said BUS, apparatus for handling said access requests comprising:
In a data processing system including (A) a plurality of units coupled together with one BUS to which each unit may access through an access request and (B) a BUS access control unit coupled to the BUS for assigning the BUS to the requesting units, apparatus for handling said access requests comprising:
Dependencies are inferred from the claim text.