Back to results
US 4,301,507 AGranted
Electronic postage meter having plural computing systems
AssigneePitney Bowes Inc.
InventorsJohn H. Soderberg, Alton B. Eckert, Robert B. McFiggans
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneePitney Bowes Inc.
InventorsJohn H. Soderberg, Alton B. Eckert, Robert B. McFiggans
Estimating the term…
An electronic postal meter has a control unit, an accounting unit and a printing unit, each incorporating a CPU having a separate crystal controlled clock. Communication between the units is serial character asynchronous, bit synchronous, in message form, with the bits of the messages being timed in accordance with a given schedule for synchronous control. The messages themselves, upon receipt by a receiver, are returned bit by bit to the transmitter, for checking, whereupon the transmitter sends a no-error pulse upon successful comparison of the transmitted message and the message received from the receiver. All control and data signals utilize the same pair of conductors in each direction with precisely defined timing for control.
An intercommunication system having a plurality of units, wherein each of said units has a computing system, a signal receiving terminal and a signal transmitting terminal, the transmitting and receiving terminals of each one of said units being connected to the receiving and transmitting terminals of another of said units, each of said units having a stable clock, each unit having means for transmitting messages by way of its transmitting terminal asynchronously in a serial message format of bit groupings of a determined number of bits and with start and stop bit, and the bits of the groupings having determined constant relative timing and said units further comprising means for sampling their receiving terminals at predetermined times for receiving sent messages, and means sampling their receiving terminals to enable the transmission of messages by way of their transmitting terminals.
A communication system having a plurality of interconnected units, each unit having a computer programmed to perform determined functions in the respective units, a serial receiving terminal coupled to a serial transmitting terminal of another of the units, and a serial transmitting terminal connected to a serial receiving terminal of the other unit, each unit further having means for applying signals asynchronously to its transmitting terminal in a serial format of a determined number of bits with start and stop bits, means for sampling the receiving terminal at determined times following receipt of a start bit, a separate stable clock for controlling the timing of transmitted bits in the sampling times of received signals, means when receiving signals for applying each received bit to its transmitting terminal upon receipt of a bit, means when transmitting for comparing each bit transmitted with the bit at its receiving terminal in the next bit period, and means responsive to an absence of comparison between said received and transmitted bits for applying an error signal to its transmitting terminal.
A postal meter having an accounting unit and a printing unit within a common secure wall, said accounting and printing units having separate microprocessors for performing separate functions related to the respective units, said units being interconnected for signal transfer solely by way of a first one-way serial communication path from said printing unit to said accounting unit and a second one-way serial communication path from said accounting unit to said printing unit, said printing and accounting units comprising means to apply signals to said first and second communication paths respectively in serial format on a bit-by-bit basis a predetermined number of bits with start and stop bits, each said unit comprising a separate stable clock for timing the bit transmission therein and for sampling bits received from the other unit, each unit further comprising means for periodically sampling the respective communication paths for receipt of signals from the other of said units, and for immediately retransmitting each received bit to the other of said units, each unit further comprising means for sampling each transmitted bit with a bit received in the next bit cycle from the other unit, and for transmitting an error signal to the other unit in the absence of a comparison.
In an electronic postage meter having a secure housing enclosing a printing unit and an accounting unit, each of said units having a computing system, a signal receiving terminal and a signal transmitting terminal, the transmitting and receiving terminals of each one of said units being connected to the receiving and transmitting terminals of the other of said units respectively, each of said units having a stable clock, each unit having means for transmitting messages by way of its transmitting terminal asynchronously in a serial message format of bit groupings of a determined number of bits and with a stop and start bit, and the bits of the groupings having determined constant relative timing and said units further comprising means for sampling the receiving terminals at predetermined times for receiving sent messages.
A postage meter comprising a first secure housing enclosing a printing unit for printing postage, a second housing within said first housing and enclosing an accounting unit having at least one register for accounting of postage printed by said meter, a control unit external of said first housing and including a keyboard and a display, a first microprocessor in said printing unit and having a program for controlling the printing of postage by said printing unit, a second microprocessor in said accounting unit and having a program for controlling accounting functions in said postage meter that must be secure from tampering, a third microprocessor in said control unit and having a program for controlling said keyboard and display, said first and second microprocessors being interconnected by way of a first two-way transmission path and said second and third microprocessors being interconnected by way of a second two-way transmission path, each of said microprocessors having transmission means for transmitting messages on the respective path in a serial bit code of groupings of a determined number of bits with start and stop bits, each microprocessor further having a receiver for receiving messages from the respective two-way transmission path, each two-way transmission path comprising a send line and a receive line, each microprocessor further comprising means for setting the signal level at its respective send line, means preparatory to the transmission of a message for testing its respective receive line twice, means responsive to the occurrence of said given level at the respective receive line at both tests for changing the signal level at its respective transmit line, and then transmitting messages in said format, each microprocessor being responsive to signal levels other than said given level on the respective receive line for inhibiting the transmitting of messages therefrom, each microprocessor further comprising means responsive to the receipt of messages on its receive line for substantially immediately retransmitting said messages on its send line independently of the level of its respective receive line, means for comparing each message originating therein with each message retransmitted thereto and applying a no-error pulse to its send line in response to a correct comparison, said no-error pulse being applied between said groupings and corresponding to the immediately preceding grouping, whereby each unit is substantially immediately informed of the correctness or incorrectness of messages received therein, said postage meter further comprising means responsive to the absence of a no-error pulse in a message transmission for inhibiting further operation of said meter.
Dependencies are inferred from the claim text.