Combined fault current and applied voltage tripping for solid state trip circuit and particular current transformer construction
AssigneeGould Inc.
InventorCarl E. Gryctko
Life of this patent
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AssigneeGould Inc.
InventorCarl E. Gryctko
Estimating the term…
A solid state trip circuit is disclosed which uses a shunt path saturable transformer comprised of a current transformer having a relatively high resistance shunt which serves to apply input voltage to the transformer primary winding. The larger the input current the higher the voltage drop across the shunt and the more quickly the transformer iron will become saturated. The saturation time during each half cycle then produces a measure of the current flow in the primary line. The output of the secondary winding of the transformer as well as a direct but resistive connection from the input circuit lines are applied to a solid state trip circuit which operates a circuit breaker trip latch. Energy for tripping at lower overload current is derived directly from the applied voltage from the line. At high overload conditions however, direct tripping occurs through energy derived from the transformer rather than directly from the line voltage.
A trip circuit for a circuit breaker;
A saturable transformer comprising a magnetic core, a single turn primary winding extending through said core, a multi-turn secondary winding surrounding said core, and a shunt conductor connected in parallel with said single turn primary winding and disposed externally of said core;
A saturable current transformer operable in a voltage transformer mode comprising, in combination:
A solid state trip circuit for a circuit breaker;
Dependencies are inferred from the claim text.