Bit enable circuitry for an image analyzer system

Apparatus for analyzing patterns made up of a matrix of points, with each point being represented by a multibit digital data signal, said apparatus comprising:

• a chain of transformation stages;
• a plurality of input lines, one each for a particular bit in the digital data signal representing said points in a pattern, operative to form an input data bus for each stage;
• each stage including analyzing means for analyzing the pattern represented by the digital data signals;
• selector means coupled to said input data bus for selecting only particular bits in said data signal for analysis by its associated stage, operative to pass nonselected bits of the same data signal unmodified to a succeeding stage in the chain;
• and central controller means coupled to said selector means for altering the selection of the particular bits in the data signals to be analyzed by each stage.