Method and apparatus for multiplying an electrical signal

A method of multiplying an input electrical signal by a multi-level multiplier, comprising the steps of:

• (a) producing a first asymmetrical square wave signal having a frequency which equals twice the fundamental frequency of said multiplier, a first predetermined phase and a duty cycle of two third;
• (b) producing at least one or both of second and third asymmetrical square wave signals having the same frequency as said fundamental frequency of said multiplier, said second and third asymmetrical square wave signals respectively having second and third phases, and said third asymmetrical square wave signal being an inverted signal of said second asymmetrical square wave signal;
• (c) switching said input electrical signal in accordance with said first asymmetrical square wave signal to obtain a primary product signal;
• and
• (d) switching said primary product signal in accordance with at least one of said second and third asymmetrical square wave signals to obtain a product of said input electrical signal and said multiplier which corresponds with the product of said first asymmetrical square wave signal and a symmetrical square wave signal having the same frequency as said fundamental frequency of said multiplier and a phase equal to said second predetermined phase.

A method of multiplying an input electrical signal by a multi-level multiplier, comprising the steps of:

• (a) producing a first asymmetrical square wave signal having a frequency which equals twice the fundamental frequency of said multiplier, a first predetermined phase and a duty cycle of two third;
• (b) producing at least one or both of second and third asymmetrical square wave signals having the same frequency as said fundamental frequency of said multiplier, said second and third asymmetrical square wave signals respectively having second and third phases, and said third asymmetrical square wave signal being an inverted signal of said second asymmetrical square wave signal;
• (c) switching said input electrical signal in accordance with at least one of said second and third asymmetrical square wave signals to obtain a product signal of said input electrical signal and one of said second and third asymmetrical square wave signals and an inverted signal of said product signal;
• (d) switching respectively said product signal and said inverted product signal in accordance with said first asymmetrical square wave signal to obtain first and second product signals;
• and
• (e) subtracting said second product signal from said first product signal to produce an output product signal indicative of the product of said input electrical signal and said multiplier which corresponds with the product of said first asymmetrical square wave signal and a symmetrical square wave signal having the same frequency as said fundamental frequency of said multiplier and a phase equal to said second predetermined phase.

A multiplier circuitry for multiplying an input electrical signal by a multi-level multiplier, comprising:

• (a) an oscillator for producing an oscillation signal the frequency of which is a multiple of the fundamental frequency of said multi-level multiplier, said oscillation frequency having a predetermined phase;
• (b) a first signal generator responsive to said oscillation signal for producing an asymmetrical square wave signal having a frequency which equals twice the fundamental frequency of said multi-level multiplier, a predetermined duty cycle and a predetermined phase;
• (c) a frequency divider responsive to said asymmetrical square wave signal from said first signal generator for dividing the frequency of said asymmetrical square wave signal by two, said frequency divider producing at least one output signal;
• (d) a second signal generator responsive to said input electrical signal, to said asymmetrical square wave signal from said first signal generator and to said output signal of said frequency divider, for multiplying said input electrical signal by said asymmetrical square wave signal and subsequently by a symmetrical square wave signal, which is obtained from said output signal of said frequency divider, or vice versa to produce an output product signal.

A method of FM stereo multiplex decoding a composite stereo signal including at least a main signal indicative of the sum (L+R) of the left and right channel signals (L) and (R), a sub signal indicative of the difference (L-R) between the left and right channel signals (L) and (R), and a pilot signal of a predetermined frequency, comprising the steps of:

• (a) producing an asymmetrical square wave signal having a frequency which equals four times the frequency of said pilot signal, a predetermined phase and a duty cycle of two third;
• (b) producing a symmetrical square wave signal having a frequency which equals twice the frequency of said pilot signal, and a predetermined phase;
• (c) multiplying said composite stereo signal by said asymmetrical square wave signal and by said symmetrical square wave signal to obtain the difference component (L-R) and its inverted component (R-L);
• and
• (d) matrixing said sum component (L+R), said difference component (L-R) and said inverted difference component (R-L) to demodulate said left and right channel signals (L) and (R) respectively.

An FM stereo multiplex decoding system for demodulating a composite stereo signal obtained by an FM detector, comprising:

• (a) an oscillator for producing a signal having a frequency which is a multiple of a suppressed sub carrier wave of said composite stereo signal, and a predetermined phase;
• (b) a signal generator responsive to the output signal of said oscillator for producing an asymmetrical square wave signal having a frequency which equals twice the frequency of said suppressed sub carrier wave, a predetermined duty cycle and a predetermined phase;
• (c) a frequency divider for dividing the frequency of said asymmetrical square wave signal by two;
• and
• (d) a stereo demodulator for multiplying said composite stereo signal by said asymmetrical square wave signal, and subsequently by the output signal of said frequency divider of vice versa for obtaining a difference component (L-R) and an inverted difference component (R-L) of the left and right channel signals (L) and (R), said stereo demodulator having a matrix means for matrixing said composite stereo signal, said difference component (L-R) and said inverted difference component (R-L) to demodulate said left and right channel signals (L) and (R) respectively.

An FM stereo multiplex decoding system for demodulating a composite stereo signal obtained by an FM detector, comprising:

• (a) an oscillator the oscillation frequency of which is controllable;
• (b) a signal generator responsive to the output signal of said oscillator for producing an asymmetrical square wave signal having a predetermined duty cycle and a predetermined phase;
• (c) a first frequency for dividing the frequency of said asymmetrical square wave signal by two;
• (d) a second frequency divider for dividing the frequency of the output signal of said first frequency divider by two;
• (e) a gate circuit responsive to said asymmetrical square wave signal and to said output signal of said first frequency divider for producing a square wave signal having the same frequency as said output signal of said first frequency divider and a predetermined duty cycle;
• (f) a phase comparator responsive to said composite stereo signal having at least a pilot signal component, to the output signal of said second frequency divider and to the output signal of said gate circuit for multiplying said composite stereo signal by said output signal of said gate circuit and subsequently by said output signal of said second frequency divider or vice versa to produce a product signal;
• (g) a low pass filter for passing a low frequency component of the output signal of said phase comparator;
• (h) a d.c. amplifier responsive to the output signal of said low pass filter to produce an output signal which is fed to an input terminal of said oscillator to control the oscillation frequency thereof, said oscillator, signal generator, first and second frequency dividers, gate circuit, phase comparator, low pass filter and d.c. amplifier constituting a phase locked loop so that the frequency of said asymmetrical square wave signal produced by said signal generator equals twice the frequency of a suppressed sub carrier wave of said composite stereo signal, while the frequency of the output signal of said first frequency divider equals the frequency of said suppressed sub carrier signal;
• (i) a stereo demodulator for multiplying said composite stereo signal by said asymmetrical square wave signal from said signal generator, and subsequently by the output signal of said first frequency divider or vice versa for obtaining a difference component (L-R) and an inverted difference component (R-L) of the left and right channel signals (L) and (R), said stereo demodulator having a matrix means for matrixing said composite stereo signal, said difference component (L-R) and said inverted difference component (R-L) to demodulate said left and right channel signals (L) and (R) respectively.