Reversible analog to digital converter with high precision
AssigneeBell Telephone Laboratories, Incorporated
InventorRobert L. Carbrey
Life of this patent
Estimating the term…
Abstract
A reversible analog to digital converter is designed for high precision in the interrelation of analog voltages and binary digital representations. An upper and a lower limit voltage converge on the analog voltage level in binarily decreasing steps. The upper and lower limits are averaged to form a trial voltage; in A/D conversion the trial voltage replaces one of the limits in accordance with a comparison between the analog voltage and the trial voltage, in digital to analog conversion the trial voltage replaces one of the limits in accordance with a binary input signal.
Claims13
A signal generator characterized by:
- means for storing upper and lower limit voltages that are initially set to predetermined maximum and minimum levels respectively;
- means for averaging the stored upper and lower limit voltages to form a trial voltage;
- means for lowering the magnitude of the stored upper limit voltage to the level of the trial voltage in response to one state of a binary signal to form a new upper limit voltage;
- means for raising the magnitude of the stored lower limit voltage to the level of the trial voltage in response to an other state of the binary signal to form a new lower limit voltage;
- and
- means for averaging the magnitude of the new upper limit voltage with the magnitude of the new lower limit voltage to form a new trial voltage.
In a converter for interchanging analog and digital voltages:
- means for storing an upper limit voltage and a lower limit voltage, said limit voltages being initially set to predetermined maximum and minimum levels respectively;
- means for averaging said upper and lower limit voltages to form a trial voltage;
- means for storing said trial voltage;
- means responsive to one state of a binary signal for averaging the upper limit voltage and the trial voltage to form a new upper limit voltage;
- means responsive to an other state of the binary signal for averaging the lower limit voltage and the trial voltage to form a new lower limit voltage;
- and
- means for averaging the new upper and new lower limit voltages to form a new trial voltage.
In a digital-to-analog converter wherein a binary signal is converted into a voltage level, said binary signal including logarithmic encoded information for locating a voltage range plus linear encoded information for locating the voltage level within said voltage range, wherein the voltage level has a magnitude residing between an upper and lower limit voltage initially set to predetermined maximum and minimum levels respectively,
- means for storing the upper limit voltage and the lower limit voltage;
- means for averaging the magnitudes of said stored upper and lower limit voltages to form a trial voltage;
- means responsive to one state of the binary signal for lowering the magnitude of the stored upper limit voltage to the magnitude of the trial voltage to form a new upper limit voltage and responsive to an other state of the binary signal for raising the magnitude of the stored lower limit voltage to the magnitude of the trial voltage to form a new lower limit voltage;
- means for averaging the magnitude of the new upper limit voltage with the magnitude of the new lower limit voltage to form a new trial voltage;
- and
- means for converting said logarithmic encoded information into a plurality of binary digits of said one state for successively lowering the magnitude of the upper limit voltage.
In an analog-to-digital converter for converting a voltage level into a binary signal wherein the voltage level has a magnitude residing between an upper and a lower limit voltage initially set to predetermined maximum and minimum levels respectively characterized by:
- means for storing the upper limit voltage and the lower limit voltage;
- means for averaging the magnitudes of the stored upper and lower limit voltages to form a trial voltage;
- means for periodically comparing the magnitude of said voltage level with the magnitude of the trial voltage to generate a binary signal in accordance with the outcome of the comparison;
- means responsive to one state of the binary signal for lowering the magnitude of the stored upper limit voltage to the magnitude of the trial voltage to form a new upper limit voltage;
- means responsive to an other state of the binary signal for raising the magnitude of the stored lower limit voltage to the magnitude of the trial voltage to form a new lower limit voltage;
- means for averaging the magnitude of the new upper limit voltage with the magnitude of the new lower limit voltage to form a new trial voltage;
- means for recording the number of times the upper limit voltage is lowered before the lower limit voltage is first raised;
- and
- means for encoding said recorded number as a binary count, said binary count being designated as a logarithmic code signal.
Dependencies are inferred from the claim text.