Single ramp comparison analog to digital converter

An electronic circuit with a charging and discharging circuit comprising:

• a series circuit of a current limiting means and a capacitor connected between a power supply terminal and a ground terminal so that one end terminal of said capacitor in said series circuit is connected to said ground terminal while one end terminal of said current limiting means is connected to said power supply terminal;
• a switching means connected in parallel with said capacitor to provide a discharge path for said capacitor when the switching means is conductive, said switching means having a control electrode for controlling the conductivity thereof;
• a first voltage comparator having two input terminals and an output terminal, one of said two input terminals being connected to the juncture between said current limiting means and said capacitor so as to supply the terminal voltage appearing across said capacitor to said one input terminal of said first voltage comparator;
• a reference voltage source connected between the other input terminal of said first voltage comparator and said ground terminal so as to provide a predetermined voltage to said other input terminal of the first voltage comparator;
• a first pulse source coupled to the control electrode of said switching means through a first logic means, wherein said first pulse source generates a control pulse signal which alternately repeats a first predetermined period of a first voltage level and a second predetermined period of a second voltage level, said first predetermined period of the control pulse signal being provided to determine the time during which said switching means is rendered conductive, while said second predetermined period of the control pulse signal is provided to determine the time during which said switching means is rendered non-conductive;
• and
• wherein said first logic means includes two input terminals connected to said output terminal of the first voltage comparator and said first pulse source respectively, and an output terminal connected to said control electrode of the switching means, for causing said switching means to be conductive so as to permit said capacitor to be discharged during a first portion of said first predetermined period when the terminal voltage of said capacitor is higher than said predetermined voltage of the reference voltage source, and causing said switching means to be non-conductive so as to stop said capacitor from being discharged through said switching means during a second portion of said first predetermined period when the terminal voltage of said capacitor becomes lower than said predetermined voltage of the reference voltage source, thereby to prevent unnecessary discharging of the capacitor through said switching means after the terminal voltage of said capacitor becomes lower than a predetermined voltage in said first predetermined period of the control pulse signal;
• and
• an output terminal connected to the juncture of said series circuit for deriving an output signal voltage appearing across said capacitor, further comprising:
• a holding circuit means, coupled between said output terminal of the first voltage comparator and said series circuit, for stopping the supply of power to said series circuit and thereby holding the terminal voltage of said capacitor in the vicinity of said predetermined voltage of the reference voltage source.

In an electronic circuit with a charging and discharging circuit comprising:

• a charging and discharging circuit including a capacitor and a switching means coupled to said capacitor for enabling said capacitor to charge or discharge, said switching means having a control electrode for controlling the conductivity thereof;
• and
• a control pulse signal supplied to said control electrode of the switching means for defining the period of charging or discharging action of said capacitor, said control signal having a predetermined voltage level generated during said period to cause said switching means to be conductive or non-conductive,
• the improvements in said electronic circuit comprising:
• a first voltage comparator means for comparing the terminal voltage appearing across said capacitor with a reference voltage and delivering an output signal;
• a first logic means for applying said control pulse signal to said switching means, said first logic means receiving the output signal of said first voltage comparator means and said control pulse signal, and inhibiting said predetermined voltage level of said control signal from being supplied to said control electrode of the switching means at the time when the terminal voltage of said capacitor has a predetermined relationship to said reference voltage in the period of said control pulse signal, thereby to prevent unnecessary charging or discharging action defined in said period of said control pulse signal;
• a second voltage comparator means for comparing the terminal voltage of said capacitor with an analog input voltage and delivering an output signal having a pulse width corresponding to the amplitude of said analog input voltage;
• and
• a second logic means for receiving the output signals of said first and second voltage comparator means and a clock pulse signal, and passing said clock pulse signal within the period corresponding to said pulse width of the output signal of the second voltage comparator means and thereby obtaining a digital output signal which has the number of clock pulses corresponding to the value of said analog voltage, further comprising;
• a third logic means for receiving the output signal of said first voltage comparator means and for stopping the supply of power to said charging and discharging circuit.

An analog-to-digital (A-D) converter circuit comprising:

• a charging and discharging circuit connected between a pair of power supply terminals, and including a parallel connection of a capacitor and a switching means, said switching means having a control electrode for controlling the conductivity of said switching means;
• first and second voltage comparators, each having two input terminals and an output terminal, one input terminal of said first voltage comparator being supplied with an analog input voltage while the other input terminal of said first voltage comparator is connected to said capacitor so as to supply the terminal voltage appearing across said capacitor to said first voltage comparator, and one terminal of said second voltage comparator being connected to said other terminal of the first voltage comparator while the other terminal of said second voltage comparator is supplied with a reference voltage predetermined in relation to said input voltage;
• a first pulse source for generating a control pulse signal which alternately repeats a first predetermined period of a first voltage level and a second predetermined period of a second voltage level;
• a second pulse source for generating a clock pulse signal which alternately repeats a third predetermined period of the first voltage level and a fourth predetermined period of the second voltage level and has a frequency of the alternating repetitions higher than that of said control pulse signal;
• a first logic means for receiving said control pulse signal and the output signal appearing at the output terminal of said second voltage comparator, said first logic means producing a driving signal to cause said switching means to be conductive and thereby to permit said capacitor to be discharged during the period when the terminal voltage of said capacitor is higher than said reference voltage in said first predetermined period of the control pulse signal;
• a second logic means for receiving the output signals at the output terminals of said first and second voltage comparators, and said clock pulse signal, and passing said clock pulse signal during the period when the terminal voltage of said capacitor is in the range between the reference voltage and the analog input voltage in said second predetermined period of the control pulse signal and thereby obtaining a digital output signal corresponding to the value of said analog input voltage in said second predetermined period of the control pulse signal;
• and
• a holding circuit, coupled between said output terminal of the second voltage comparator and said charging and discharging circuit, for holding the terminal voltage of said capacitor at said reference voltage by stopping the supply of power to said charging and discharging circuit from the time when the terminal voltage of said capacitor reaches said reference voltage by the discharging action of said switching means to the time of arrival of the next clock pulse of said clock pulse signal.