Four terminal voltage tripler for monolithic LCD clock circuit

#This disclosure relates to voltage multipliers and in particular to a voltage tripler for providing a 4.5 volt supply for driving a liquid crystal display (LCD) of a digital clock which utilizes a 1.5 volt battery for power.

#The prior art method of multiplying a DC voltage of 1.5 volts to a level of 4.5 volts for the purpose of driving an LCD clock display utilizes charge transfer with switched capacitors. In the case of an integrated circuit digital clock, the prior art tripler requires three capacitors, five terminals (or pads) on the chip and a single digital driving signal (typically 512 Hz). During one half of the period of the driving signal, two of the three capacitors are charged across the battery in a parallel connection. This charges each of the capacitors to 1.5 volts. During the second half period, the two capacitors are connected in series and referenced to the negative side of the battery and one end of the third capacitor. This puts the total voltage on the third capacitor at three times that of the battery. The third capacitor may be thought of as a storage capacitor or filter capacitor. This method is shown schematically in FIG. 1.

#Although the prior art method provides the required multiplied voltage, it requires the use of five terminals on a chip. Because of size limitations with chips, it is desirable to use as few terminals as possible for any particular function. The present invention is directed to a voltage tripler which requires only four terminals on a chip instead of the usual five.

#In the drawings:

#FIG. 1 shows two phases of a capacitor configuration used in prior art voltage multipliers;

#FIG. 2 is a schematic diagram showing the capacitor interconnection and switching arrangement of the present invention;

#Referring to FIG. 2, the voltage tripler of the present invention includes three capacitors 10, 12 and 14 and a plurality of switches 16-26 for controlling the interconnections of the capacitors. The voltage multiplication is accomplished by switching the switches through four phases a plurality of times. The switching and operational sequences are shown in FIGS. 3 and 4 respectively. During the first phase, switches 16 and 18 are closed and the remainder of the switches opened to connect one terminal of the capacitor 10 to the positive side (V.sub.dd) of a battery and the other terminal of the capacitor 10 to the negative side (V.sub.ss) of the battery. This will charge the capacitor 10 to a voltage approximately equal to that of the battery.

#During the second phase of the sequence, the switches 20 and 22 are closed and the remaining switches opened. This connects the capacitor 10 in parallel with the capacitor 12 and causes a portion of the charge on the capacitor 10 to be transferred to the capacitor 12. The capacitors 10 and 12 are approximately equal in value and about one half of the charge on the capacitor 10 will therefore be transferred to the capacitor 12. The voltage drop across the capacitor 12 at this point will be approximately one half of the voltage of the battery.

#During the third phase of the sequence, switches 16 and 18 are again closed so as to recharge the capacitor 10 to the battery voltage. After the capacitor 10 has been charged, the switches 16 and 18 are opened and switches 24 and 26 are closed. The closing of the switches 24 and 26 connects the capacitor 14 in parallel with the capacitor 10, and charge is therefore transferred from the capacitor 10 to the capacitor 14. As is the case with the capacitor 12, the value of the capacitor 14 is approximately equal to that of the capacitor 10 and approximately one half of the charge of the capacitor 10 will be transferred to the capacitor 14.