Electrically variable impedance circuit

An electrically variable impedance circuit comprising:

• a voltage-current converter circuit having first and second input terminals the impedance between which is to be controlled and first and second output terminals for respectively supplying said first and second output terminals with first and second output currents which vary in opposite directions with respect to a reference current in response to input signal potentials at said first and second input terminals, a varying component of each of the first and second output currents being linearly proportional to a difference between the input signal potentials at said first and second input erminals;
• a current converter circuit having third and fourth input terminals respectively connected to said first and second output terminals of said voltage-current converter circuit and third and fourth output terminals for supplying said third and fourth output terminals with third and fourth output currents, respectively, which are linearly proportional to the first and second output currents, respectively, at least one output terminal of said current converter circuit being coupled to one of said first and second input terminals of said voltage-current converter circuit so that a current proportional to a difference between the third and fourth output currents of said current converter circuit is provided to said one of said first and second input terminals of said voltage-current converter circuit, said current converter circuit including first and second PN junctions respectively connected to receive the first and second output currents of said voltage-current converter circuit and develop voltages which are the logarithm of the first and second output currents, and first and second transistors each connected to receive between the base and emitter thereof the voltage developed by a corresponding one of said first and second PN junctions and produce a collector current which is the exponential of the voltage developed by said corresponding one of said first and second PN junctions;
• and
• impedance control means for varying the ratio between the sum of the first and second output currents of said voltage-current converter and the sum of the third and fourth output currents of said current converter circuit.

An electrically variable impedance circuit comprising:

• a voltage-current converter circuit having first and second input terminals the impedance between which is to be controlled and first and second output terminals for respectively supplying said first and second output terminals with first and second output currents which vary in opposite directions with respect to a reference current in response to input signal potentials at said first and second input terminals, a varying conponent of each of the first and second output currents being linearly proportional to a difference between the input signal potentials at said first and second input terminals;
• and
• a current converter circuit including a current amplifier circuit for amplifying the first and second output currents of said voltage-current converter circuit by the same factor to produce third and fourth output currents, a current divider circuit connected to receive the third and fourth output currents of said current amplifier circuit for dividing the third and fourth output currents by the same factor to produce fifth and sixth output currents;
• and a current mirror circuit connected to receive the fifth and six output currents of said current divider circuit, a junction between said current mirror circuit and said current divider circuit being connected to one of said first and second input terminals of said voltage-current converter, and said current divider circuit including first and second pairs of differential transistors having commonly connected emitters and connected to receive the fifth and sixth output currents of said current amplifier circuit at the respective commonly connected emitters and the bases of said differential transistors of each pair being connected to receive a control voltage signal therebetween whereby collector currents of said differential transistors of each pair have a ratio therebetween dependent on the magnitude of the control voltage signal.