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AssigneeInternational Standard Electric Corporation
InventorsRaymond T. G. Boute, Wilfried L. J. De Kinder, Gustaaf W. T. Neutjens, Andre G. G. Pochet, Jan P. M. Vanderschoot, Jacques D. A. Van Remortel
Estimating the term…
A time division multiplex communication system comprised of a plurality of modules, each module being equipped with a space division concentrator and a processor. The modules are interconnected by a control bus and by a plurality of speech busses, the number of speech busses being equal to the maximum number of modules. All busses are connected to each equipped module. The control bus is commonly connected to all modules and this bus is, in turn, controlled by a control circuit. In the control circuit, there is a flip-flop for each module for enabling a scanner in the control circuit to set the address of a module seeking use of the control bus. The processor in the module seeking service recognizes its address and transmits its call processing data on the control bus. Each speech bus is comprised of eight wires for parallel PCM bit transmission with time slot interchanging.
Time Division Multiplex (TDM) communication system including a plurality of TDM busses able to exchange signals through time slots on said busses and each time slot being divided into a number of time intervals, the invention in which the system is comprised of a plurality of modular units interconnected by said busses, each bus being connected to a plurality of terminal circuits, each unit including a signal processor, a space switch and a time switch, the space switch including means for forwarding during successive time intervals of a time slot, successive communication samples from distinct busses towards a time switch for shifting all said samples to another time slot and under the control of the signal processor individual to the unit, and wherein the number of said plurality of units is equal to the number of said plurality of busses and that each of said units includes a signal or data output circuit, the output of which is connected to a different bus of said plurality of busses and each unit includes a receiver circuit having a number of inputs which are also those of the space switch of that unit, the number of said inputs being at least equal to the number of said plurality of busses, each input connecting a different one of said busses with said space switch, selecting means in said time switch to enable said space switch to select from one of said busses TDM signals directed to that unit.
Time Division Multiplex (TDM) communication system including a plurality of TDM busses able to exchange signals through time slots on said busses and each time slot being divided into a number of time intervals, the invention in which the system is comprised of a plurality of modular units interconnected by said busses, each bus being connected to a plurality of terminal circuits, each unit including a signal processor, a space switch and a time switch, the space switch including means for forwarding during successive time intervals of a time slot, successive communication samples from distinct busses towards a time switch for shifting all said samples to another time slot and under the control of the signal processor individual to the unit, and wherein said signal processors are interconnected through a common control bus via which control information is interchanged between said processors.
Time Division Multiplex (TDM) communication system including a plurality of TDM busses able to exchange signals through time slots on said busses and each time slot being divided into a number of time intervals, the invention in which the system is comprised of a plurality of modular units interconnected by said busses, each bus being connected to a plurality of terminal circuits, each unit including a signal processor, a space switch and a time switch, the space switch including means for forwarding during successive time intervals of a time slot, successive communication samples from distinct busses towards a time switch for shifting all said samples to another time slot and under the control of the signal processor individual to the unit, and wherein each said time switch includes memory means with associated writing and reading means and wherein the addresses of calling time slots allotted to a calling terminal circuit, the addresses of called time slots allotted to a called terminal circuit and the addresses of the calling unit are registered in the order of the calling time slots for each effective and requested communication, said memory means being read out by said reading means during successive allotted time intervals of said calling time slots except during the examination of the unallotted remaining time intervals of said same calling time slot during which inhibiting means are operative to suppress said read out.
Dependencies are inferred from the claim text.