Phase locked loop out-of-lock detector
AssigneeSperry Corporation
InventorsBilly K. Swift, Anthony F. Zizzo, Willard A. Blevins
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Abstract
The out-of-lock condition of a digital phase locked loop is detected during a plurality of states such that single bit discrepancies, such as a noise pulse, are ignored, and thus the tolerable range of phase detection error is broadened. The present invention is adaptable for use with typical applications of digital phase locked loops, and can be used to control the phase detector of the digital phase locked loop such that error voltages will be introduced into the loop only during selected states.
Claims5
A circuit for detecting an out-of-lock condition of a digital phase locked loop, having a phase detector, a voltage controlled oscillator, and a frequency divider, which comprises:
- wave shaping means having input terminal means for receiving an input signal, and output terminal means for providing said digital phase locked loop with a window signal having periodic pulses of a fixed time width and a stable reference signal;
- and
- sequential logic means coupled to the output terminal means of said wave shaping means and coupled to the output terminal means of said digital phase locked loop, for receiving the window signal from said wave shaping means and the voltage controlled oscillator's output signal from said digital phase locked loop, for detecting the occurrence of an edge of the voltage controlled oscillator's output signal wihin a pulse of the window signal during a plurality of states, and for signalling the existence of selected states in which the edge of the voltage controlled oscillator's output signal does not occur within a pulse of the window signal.
Dependencies are inferred from the claim text.