Power amplifier apparatus having over-current protection function

An amplifier comprising:

• an input terminal for receiving an input signal;
• means coupled to said input terminal for generating from said input signal a first and a second signal having mutually opposite phases;
• series-connected first and second transistors;
• first driving means for driving said first and second transistors alternatively in response to said first signal;
• series-connected third and fourth transistors;
• second driving means for driving said third and fourth transistors alternatively in response to said second signal;
• a first output terminal coupled to a junction between said first and second transistors;
• a second output terminal coupled to a junction between said third and fourth transistors, said first and second output terminals being adapted to have a load connected therebetween;
• first and second over-current detector circuits respectively coupled to said first and second output transistors;
• first and second protective circuits responsive to the outputs of said first and second over-current detector circuits, respectively, for protecting said first and second output transistors;
• third and fourth over-current detector circuits respectively coupled to said third and fourth output transistors;
• third and fourth protective circuits responsive to the outputs of said third and fourth over-current detector circuits, respectively, for protecting said third and fourth output transistors;
• means for applying an output of said first over-current detector circuit to said fourth protective circuit;
• means for applying an output of said second over-current detector circuit to said third protective circuit;
• means for applying an output of said third over-current detector circuit to said second protective circuit, and means for applying an output of said fourth over-current detector circuit to said first protective circuit.

A power amplifier comprising:

• a first amplifier including:
• a first series connection of collector-emitter paths of first and second output transistors connected between first and second power supply terminals, said first and second output transistors being coupled to said first and second power supply terminals, respectively;
• means for driving said first and second output transistors alternatively in response to a first signal fed through a first input terminal;
• first and second means for producing a current in proportion to the operating current flowing through said first and second output transistors, respectively;
• first and second over-current detector circuits each having a resistor which generates a voltage drop across both ends due to a current from said first and second means for producing a current, respectively;
• first and second protective circuits provided for said first and second output transistors, respectively, and each including a first transistor having an emitter and a base connected to respective ends of said resistor in said first and second over-current detector circuits and a collector coupled to the base of the corresponding output transistor, respectively;
• a first output terminal coupled to said first series connection;
• a second amplifier including:
• a second series connection of collector-emitter paths of third and fourth output transistors connected between said first and second power supply terminals, said third and fourth output transistors coupled to said second and first power supply terminals, respectively, means for driving said third and fourth output transistors alternatively in response to a second signal fed through a second input terminal;
• third and fourth means for producing a current in proportion to the operating current flowing through said third and fourth output transistors, respectively;
• third and fourth over-current detector circuits each having a resistor which generates a voltage drop across both ends due to a current from said third and fourth means for producing a current, respectively;
• third and fourth protective circuits provided for said third and fourth output transistors respectively, and each including a first transistor having an emitter and a base connected to respective ends of said resistor in said third and fourth over-current detector circuits and a collector coupled to the base of the corresponding output transistor;
• a second output terminal coupled to said second series connection;
• means for obtaining said first and second signals from one input signal, the phase of said first signal being opposite to that of said second signal;
• a load coupled between said first and second output terminals;
• and
• each said first, second, third and fourth protective circuits further including a second transistor having an emitter and base connected to respective ends of said resistor, the collector of said second transistor in said first protective circuit being coupled to the base of said fourth output transistor, the collector of said second transistor in said second protective circuit being coupled to the base of said third output transistor, the collector of said second transistor in said third protective circuit being coupled to the base of said second output transistor, and the collector of said second transistor in said fourth protective circuit being coupled to the base of said first output transistor.