Transistor amplifying circuit for preventing the operation of an amplifying transistor in the quasi-saturation region

A transistor circuit comprising:

• a first transistor and a second transistor, each having of the n-p-n type;
• a p-n-p type third transistor having its collector connected to the emitter of said first transistor;
• and
• level-shift diode means;
• said first and second transistors being connected with each other in a Darlington circuit arrangement;
• said second transistor forming the prestage of the Darlington circuit arrangement and said first transistor forming its post-stage;
• the collector of said first transistor being connected to the base of said third transistor;
• the base of said second transistor being connected to the emitter of said third transistor via said level-diode means.

A transistor circuit comprising:

• a first transistor;
• a first p-n junction device, the one terminal of which is connected to the base of said first transistor;
• a second p-n junction device, the one terminal of which is connected to the other terminal of said first p-n junction device;
• and
• a control transistor of the opposite conduction type to said first transistor, the emitter of which is connected to the other terminal of said second p-n junction device;
• wherein said first p-n junction device and said second p-n junction device are connected in the forward directions between said emitter of said control transistor and said base of said first transistor, the base and the collector of said control transistor being connected to the collector and the emitter of said first transistor, respectively.