Transition detector circuit

In a cirucit in which there are first and second transistors connected in series between a first point of operating potential and an output point and third and fourth transistors connected in series between said first and output points, and to which there is applied an input signal whose transitions between first and second levels are to be sensed the improvement comprising:

• means responsive to said input signal coupled to said first, second, third and fourth transistors for:
• (a) turning on said first transistor and turning off said third transistor for one value of said input signal and for turning off said first transistor and turning on said third transistor for the other value of said input signal;
• (b) turning off said second transistor a first time period after said first transistor is turned on and for turning it on a second time period after said first transistor is turned off;
• and
• (c) for turning off said fourth transistor a third time period after said third transistor is turned on and for turning it on a fourth time period after said third transistor is turned off.

A circuit for detecting the transitions of an input signal between first and second levels, comprising:

• an input terminal adapted to receive said input signal;
• first and second points of operating potential,
• an output point;
• first, second, third and fourth transistors, each transistor having a conduction path and a control electrode;
• means connecting the conduction paths of said first and second transistors in series between said first point and said output point;
• means connecting the conduction paths of said third and fourth transistors in series between said first and said output point;
• means connected between said output point and said second point for selectively providing a conduction path therebetween;
• means coupling said input terminal to the control electrode of said first transistor;
• inverting means coupled between said input terminal and the control electrode of said third transistor;
• delay means coupled between the control electrode of said third transistor and the control electrode of said second transistor;
• and
• inverting means coupled between the control electrode of said third transistor and the control electrode of said fourth transistor.