Sampling gate for TDM telecommunication system
AssigneeSocieta Italiana Telecomunicazioni Siemens S.p.A.
InventorAnes Sbuelz
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Abstract
A sampling gate of a TDM telephone system, designed to connect a subscriber station to a trunk line during an allocated time slot, comprises a pair of bucking transistors of the same conductivity type (NPN) inserted between a live wire from the station and a corresponding "hot" conductor of the trunk line whose "cold" conductor, tied to the reference wire of the subscriber line, is grounded through an elevated resistance. During the allocated time slot, the two bucking transistors are rendered conductive by a timing pulse applied across their base/emitter circuits via a transformer while a connection leading from their bases to negative biasing potential is temporarily severed by an interposed FET which is cut off by the timing pulse applied to its gate electrode via a differentiation circuit.
Claims6
In a telecommunication system in which a plurality of subscriber lines each having a live wire and a reference wire are provided with individual sampling gates controlled by timing pulses enabling the exchange of message samples, during a time slot allocated to a given subscriber line, between the live wire thereof and a first conductor of a common trunk line having a second conductor connected to the reference wires of said subscriber lines,
- the improvement wherein said sampling gate comprises:
- a pair of junction transistors of like conductivity type serially inserted in bucking relationship between said first conductor and the live wire of the associated subscriber line, said junction transistors being provided with interconnected bases and emitters forming part of an input circuit thereof coupled to a generator of said timing pulses;
- electronic switch means normally connecting said bases to a supply of biasing potential cutting off said junction transistors, said electronic switch means being coupled to said generator for disconnecting said bases from said supply in the presence of timing pulses whereby said junction transistors conduct during an allocated time slot;
- first resistance means in series with said electronic switch means;
- second resistance means connecting said supply to said second conductor;
- and
- capacitive means establishing a low-impedance path for incoming message samples between said second conductor and said bases via said electronic switch means in the absence of timing pulses.
Dependencies are inferred from the claim text.