Delay circuit
AssigneeKokusai Denshin Denwa Kabushiki Kaisha
InventorsMichitoshi Tamori, Sotokichi Shintani, Hideo Kobayashi, Hidetaka Yanagidaira
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AssigneeKokusai Denshin Denwa Kabushiki Kaisha
InventorsMichitoshi Tamori, Sotokichi Shintani, Hideo Kobayashi, Hidetaka Yanagidaira
Estimating the term…
A smear filter and/or a de-smear filter having the characteristics that the delay time is proportional to the frequency comprising (a) a transversal filter having a plurality of delay elements connected in series with one another, the delay time (T) of each delay element being the same as the sampling interval of the input signal, the first delay element being connected to the input terminal, a plurality of potentiometers each connected to the junction points of said delay elements and the output of the last delay element providing the tap weight to each of the tap output, and an adder for providing the sum of the outputs of said potentiometers to provide an output of the present delay circuit, (b) a digital memory storing the precalculated value for each desired delay characteristics for providing the tap weights of said potentiometers, and (c) means for providing the content of said digital memory selectively to the potentiometers according to the desired delay characteristics.
A delay circuit having the characteristics that the delay time is proportional to the frequency comprising:
Dependencies are inferred from the claim text.