Circuit arrangement for the compensation of the temperature coefficient of semiconductor junctions

Abstract

An arrangement for compensating the temperature coefficient of the semiconductor junction connected in a circuit, comprising first, second, and third transistors of the same predetermined type, each having a base-emitter junction and operatively connected to have a respective collector current, and a resistive voltage divider having two ends in a center tap. The transistors and the divider are operatively connected such that the voltages of the base-emitter junctions of the first and second transistors are summed and applied across the ends of the voltage divider. The voltage from one end to the center tap of the voltage divider is connected across the base-emitter junction of the third transistor. The collector current of the third transistor thus corresponds to the geometric mean of the respective collector currents of the first and second transistors and is substantially less temperature-dependent than the collector current of the first transistor. The arrangement is particularly useful in circuits for exposure measuring and control in photographic devices.

Dependencies are inferred from the claim text.