Method and apparatus for controlling data transfer direction on a data bus
AssigneeHitachi, Ltd.
InventorsYuzo Kita, Noboru Yamaguchi, Masaru Shibukawa, Kazuo Minorikawa
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Abstract
In a system comprising a memory, an input/output control device, a direct memory access controller and a data bus, the transfer of data between the memory and the input/output control device via the data bus by means of said direct memory access controller during the period of direct memory access mode is effected by controlling the data transfer direction on a data bus so that a control signal for determining the direction of transferring the data by said data bus is recognized in an inverted manner at the memory or the input/output control device only during the period of a data transfer cycle in the direct memory access mode.
Claims6
In a system comprising a memory, an input/output controller for controlling data transfer to and from an input/output device, a data bus, and a direct memory access controller which generates a control signal applied in non-inverted form to at least one of said memory and said input/output controller, said control signal determining the direction of the data transfer in said input/output controller and said memory,
- a method of controlling the direction of data transfer on said data bus, comprising the steps of
- (a) recognizing in an inverted manner the level of the control signal in said input/output controller only during the data transfer cycle in the direct memory access transfer mode under a cycle steal mode, and
- (b) controlling the direction of transferring the data on said data bus in said input/output controller in response to the control signal recognized by said recognizing step(a).
In a system comprising a memory, and input/output controller for controlling data transfer to and from an input/output device, a data bus, and a direct memory access controller which generates a control signal applied in non-inverted form to at least one of said memory and said input/output controller, said control signal determining the direction of the data transfer in said input/output controller and said memory,
- an arrangement for controlling the direction of data transfer on said data bus comprising
- first means in said input/output controller for recognizing in an inverted manner the level of the control signal in said input/output controller only during the data transfer cycle in the direct memory access transfer mode under a cycle steal mode, and
- second means in said input/output controller for controlling the direction of transferring the data via said data bus in response to said control signal being recognized by said first means.
Dependencies are inferred from the claim text.