US 4,283,483 A · Process for forming semiconductor devices using electron-sensitive resist patterns with controlled line profiles

Abstract

The specification describes a process for defining a predetermined region on and above a substrate by using a resist pattern having a controlled line profile. First, a composite electron-beam sensitive resist comprising a bottom layer of resist, a middle layer of a chosen conductive material, and a top layer of resist is formed on a selected substrate. The substrate with the composite resist is exposed to a beam of electrons to simultaneously define a predetermined pattern in the top and bottom layers of the resist. Next, a first chosen solvent is applied for a first predetermined period of time to develop the pattern in the top layer of resist, with the layer of conductive material protecting the bottom layer of resist from exposure of the first chosen solvent. Then, the portion of the conductive layer which is exposed after development of the top resist layer, is removed. Finally, a second chosen solvent is applied for a second predetermined period of time to develop the pattern in the bottom layer of resist and to thereby form a T-shaped profile in the composite resist, which defines the desired region on and above the substrate. In a preferred embodiment of the present invention, metal is subsequently deposited on the defined region of the substrate to form a metal pattern having the same controlled profile as the composite resist.

Claims7

Dependent claims

A process for forming a conductive electrode of variable cross-section area which comprises the steps of:

(a) providing a three layer mask on a substrate with the first or inner layer and third or outer layer being of a chosen electron-sensitive resist material and separated by an intermediate etch resistant conductive layer;
(b) defining predetermined patterns in said first layer and said third layer of resist simultaneously by electron bombardment which penetrates said conductive layer;
(c) forming a first opening in said third layer while shielding said first layer with said conductive layer, said first opening having a first chosen width;
(d) successively removing portions of said intermediate and first layers to thereby produce second and third openings therein, said second opening in said intermediate layer having a second chosen width substantially equal to said first width of said first opening and said third opening in said first layer having a third chosen width smaller than said first and second widths;
and
(e) depositing a chosen metal in said openings formed in (c) and (d) above to thereby form said electrode of variable cross-section area, and with variable width essential replicating said widths of said first, second, and third openings.

3 more elements

A process for defining a predetermined region on and above a substrate by using a resist pattern having a controlled line profile comprising the steps of:

(a) providing said substrate;
(b) forming on said substrate a composite electron beam-sensitive resist comprising a bottom layer of said resist, a middle layer of a chosen conductive material, and a top layer of said resist to create a resist/conductor/resist composite;
(c) exposing said substrate with said resist/conductor/resist composite formed thereon to a beam of electrons so as to define a predetermined pattern in both of said resist layers, said beam having sufficient energy to expose said bottom and top layers of said resist;
(d) developing said pattern in said top layer of said resist by exposure to a first chosen solvent for a first predetermined period of time whereby said relatively thin layer of said conductive material protects said bottom layer of said resist from exposure to said first chosen solvent;
(e) removing the portion of said conductive layer which is exposed after said developing of said top layer of said resist;
and
(f) developing said pattern in said bottom layer of said resist by exposure to a second chosen solvent for a second predetermined period of time to thereby form a T-shaped profile in said resist/conductor/resist composite, which defines said region on and above said substrate.

4 more elements

A process for defining a non-symmetrical T-shaped region on and above a substrate by using a resist pattern having a controlled line profile comprising the steps of:

(a) providing said substrate;
(b) forming on said substrate a composite electron beam-sensitive resist comprising a bottom layer of said resist, a middle layer of a chosen conductive material, and a top layer of said resist to create a resist/conductor/resist composite;
(c) exposing said substrate with said resist/conductor/resist composite formed thereon to a primary beam of electrons so as to define a predetermined pattern in both of said resist layers, said beam having sufficient energy to expose said bottom and top layers of said resist;
(d) after (c), exposing said substrate with said resist/conductor/resist composite formed thereon to a secondary beam of electrons in a position adjacent to the position of exposure by said primary beam of electrons, said secondary beam exposing only said top layer of said resist;
(e) developing said pattern in said top layer of said resist by exposure to a first chosen solvent for a first predetermined period of time whereby said relatively thin layer of said conductive material protects said bottom layer of said resist from exposure to said first chosen solvent;
(f) removing the portion of said conductive layer which is exposed after said developing of said top layer of said resist;
and
(g) developing said pattern in said bottom layer of said resist by exposure to a second chosen solvent for a second predetermined period of time to thereby form a non-symmetrical T-shaped profile in said resist/conductor/resist composite, which defines said non-symmetrical T-shaped region on and above said substrate.

5 more elements

Dependencies are inferred from the claim text.

Process for forming semiconductor devices using electron-sensitive resist patterns with controlled line profiles

Life of this patent

Process for forming semiconductor devices using electron-sensitive resist patterns with controlled line profiles

Life of this patent

Abstract

Claims7