Processor interrupt device for an electronic engine control apparatus

For use in a control apparatus for an internal combustion engine having:

• sensor means for producing signals representative of operating conditions of said engine;
• actuator means for controlling respective energy conversion functions of said engine in response to control signals applied thereto;
• an input/output unit coupled to receive signals produced by said sensor means and to deliver control signals to said actuator means, and
• a data processing unit, coupled to said input/output unit, for carrying out engine data processing operations in accordance with signals produced by said sensor means and thereby generating engine control data to be coupled to said input/output unit;
• said input/output unit including:
• first means, coupled to said data processing unit, for receiving and storing engine control data generated by said data processing unit;
• second means, coupled to said first means, for comparing the respective engine control data received by said first means and from said data processing unit with respective prescribed operation data, and producing respective output signals in response to said respective engine control data defining a prescribed relationship with respect to said respective prescribed operation data;
• and
• third means, coupled to said second means, for producing control signals to be coupled to said actuator means in response to the output signals produced by said second means;
• the improvement comprising:
• interrupt means, coupled to said data processing means, for selectively supplying interrupt signals to said data processing means in response to which said data processing means initiates the carrying out of prescribed data processing operations;
• said interrupt means including:
• a status register, coupled to said third means, for storing interrupt data;
• a mask register, coupled to said data processing means, for storing interrupt inhibiting data selectively supplied thereto by said data processing means, and
• means, coupled to said status register and to said mask register, for producing at least one interrupt signal in accordance with the data stored in said status and mask registers, and wherein
• interrupt data stored by said status register is coupled thereto from said third means in response to said second means producing prescribed ones of said respective output signals.