Physical fitness indicator

#This invention relates to an electronic physiological performance testing device.

#Research on the measurement of physiological performance capability has shown that the measurement of pulse rate (heart beat rate) under three conditions is relevant to an assessment of the subject's capacity for performing mechanical work. These conditions are:

#1. Normal or initial pulse rate (R.sub.1)--i.e., the pulse rate at rest.

#In order that the invention may be clearly understood and readily carried into effect, devices in accordance therewith will now be described by way of example, with reference to the accompanying drawings, in which:

#FIG. 1 is a functional block diagram of a performance testing device;

#FIG. 2 is a perspective view of a performance testing device;

#There are several ways in which a device can be made to conduct the test as described above but the commercial viability of such a relatively complicated function built into a small package is based on the microprocessor circuits and their associated ancillary circuits which are now available. It will be appreciated that a drawing of the hardware must be of a fairly general system in which almost all of the features (except for the input source) which are peculiar to this invention are hidden in the Read Only Memory (ROM) or Program Memory which carries the set of instructions. It is not possible to give exact details of the program itself without restricting discussion to one particular family of microprocessor chips. It is proposed, therefore, to give a brief description of the hardware and to describe in general terms the main programming techniques required for the present device. This will enable one "skilled in the art" to build a model given this description and the normal technical literature provided by the manufacturer of the particular microprocessor.

#Referring to FIGS. 1 and 2, a PULSE SENSOR 1 is a piezoelectric displacement sensor operating on the same principle as a phonograph pick-up which is held in contact with the subject at some point where the pulse may readily be detected (e.g., on the thumb side of the wrist for the radial pulse). The sensor is conveniently held in place by an elastic strap or other means. (The construction and use of a modified phonograph cartridge element for the purpose of pulse detection is described by Geddes, L. A. and Hoff, H. E., J. Appl. Physiol., 15, 959-960 (1960). The output level from a sensor of this type is typically 1-3 mV with an effective source impedance of the order of Megohms. The high impedance level demands careful screening of the lead connecting the sensor to an AMPLIFIER 2 which is required to have a suitably high input impedance and sufficient gain to produce an output level of 3-15 volts (depending on the type of microprocessor used). This specification is readily met with an integrated circuit amplifier. The additional frequency response limiting components are made such that there is a rapid cut-off in the region of a few hundred Hz which is ample to pass the pulse signals while avoiding unwanted oscillations. The function of a SHAPER 3 (which may for example be a Schmitt trigger) is to convert the amplified pulse waveform into a rectangular pulse suitable for the input of any microprocessor. (This component may not be required in every case as some of the microprocessors available have inputs designed to accept untreated waveforms).

#The CENTRAL PROCESSOR UNIT (CPU) 5 contains the functions enclosed by the dashed line in FIG. 1 which are a CONTROL UNIT 7, an ARITHMETIC LOGIC UNIT (ALU) 8 and REGISTERS 9. All transfers between these functions and the other blocks are via a DATA BUS 16 which is a set of parallel lines (4, 8, 12, or 16 in number depending on the microprocessor--most likely 8 in this application). The broad paths in the diagram indicate these parallel lines--the arrow heads indicating way or ways the signals pass, e.g., a Read Only Memory ROM 6 only provides instructions to the bus whereas a Random Access Memory RAM 10 can exchange data in both directions with the bus. The complicated timing mechanism for routing the signals between the function blocks is contained within the control unit which contains a timing oscillator which requires one external component--usually a QUARTZ CRYSTAL 11 as shown here. (In some cases an inductor, capacitor or resistor may be used instead but a considerable reduction in timing accuracy results). The instructions received by the CPU from the ROM are executed in the CPU or in the CPU in conjunction with the ALU. The REGISTERS are data storage locations for intermediate storage during the execution of instructions and for certain other purposes in the CPU such as counting the program steps. The main temporary store, however, is the RAM in which, for instance, the measured pulse rates R.sub.1, R.sub.2 and R.sub.3 are stored in separate locations pending their use in the computation of the Performance Factor. At appropriate stages in the program the CPU is instructed to examine the voltage at one of the inputs and to JUMP or BRANCH to some specified point in the program according to the condition of the input. When it is required to display data the ROM instructs the transfer of the appropriate data from the RAM locations to the appropriate OUTPUT LINES 12. Usually with an 8-bit microprocessor the data is stored in the RAM in HEXADECIMAL (HEX) form, and, since the display will be in decimal form familiar to users it is necessary to convert the HEX data into BINARY CODED DECIMAL (BCD) form. This conversion can be done by standard sets of instructions programmed into the ROM. At the output from the CPU the BCD data has to be converted into the code required for a 7-segment display and this is the function of a DISPLAY INTERFACE CIRCUIT 13 immediately adjacent to a DISPLAY 14. This extra circuit is included because a standard circuit of this type is the most usual means of interfacing the microprocessor with the display. It is quite feasible, however, to generate the 7-segment coded data within the microprocessor and leave out the interface circuit. It is also possible to obtain individual display digits each one of which has a BCD 7-segment converter integral with it. These could be connected directly to 4-bit groups of the output lines. Whether or not an interface circuit is used in any particular case depends on the number of outputs available, the number of display digits, the ROM capacity available and the type of display.