Electrical contact connected with a semiconductor region which is short circuited with the substrate through said region

An MIS type semiconductor device having a field effect transistor and comprising:

• a semiconductor substrate of a first conductivity type;
• source and drain regions of the transistor formed in and at the surface of said substrate, each being of a second conductivity type opposite to said first conductivity type;
• an insulating film selectively covering said substrate and said source and drain regions, said insulating film having source and drain electrode windows selectively exposing a part of each of said source and drain regions, respectively;
• a source electrode formed to contact said source region through said source electrode window and to form a short circuit with said substrate through said source region, said substrate and said source electrode comprising materials capable of forming an alloy to achieve said short circuit;
• and
• a drain electrode formed to contact said drain region through said drain electrode window, said drain region being electrically separated from said substrate by a PN junction that forms between said drain region and said substrate as a result of the different conductivity types.

An MIS type semiconductor device having a field effect transistor which comprises:

• a semiconductor substrate of a first conductivity type;
• source and drain regions of the transistor formed in and at the surface of said substrate, each being of a second conductivity type opposite to said first conductivity type;
• another region of said second conductivity type formed in said substrate apart from said source and drain regions;
• an insulating film selectively covering said substrate including said regions with a plurality of windows respectively exposing each of said regions;
• source and drain electrodes respectively contacting said source and drain regions through the respective windows, each of said source and drain electrodes being electrically separated from the substrate by the respective PN junctions that form between said source and drain regions and said substrate as a result of the different conductivity types;
• and
• a back gate electrode formed in the respective other window to contact said other region and to form a short circuit with said substrate, said back gate electrode and said substrate comprising materials capable of forming an alloy between said back gate electrode and said substrate to achieve said short circuit.

A semiconductor integrated circuit having a field effect transistor which comprises:

• a semiconductor substrate of a first conductivity type;
• source and drain regions of the transistor formed in and at a surface of said substrate, each of said regions being of a second conductivity type opposite to said first conductivity type;
• a gate electrode for the gate of the transistor disposed between said source and drain regions;
• an insulating film selectively covering said surface of said substrate with windows for source and drain electrodes formed in said insulating film, each of said windows selectively exposing said source and drain regions, respectively;
• a source electrode comprising a metal layer formed to contact said source region through said source electrode window, said metal layer being of a material capable of forming an alloy with said substrate, said metal layer being ohmically connected to said substrate by a short circuit due the alloying between said metal layer and said substrate;
• and
• a drain electrode, comprising an upper metal layer formed and a lower metal layer for preventing an alloy formation of said upper metal layer with said substrate, said drain electrode ohmically contacting said drain region through said drain electrode window, and said drain electrode being electrically separated from said substrate by a PN junction that is formed between said drain region and said substrate as a result of the different respective conductivity types.

A semiconductor integrated circuit having a field effect transistor which comprises:

• a semiconductor substrate of a first conductivity type;
• source and drain regions of the transistor formed in and at the surface of said substrate, each of said regions being of a second conductivity type opposite to said first conductivity type;
• a further region of said second conductivity type formed in said substrate apart from said source and drain regions;
• an insulating film selectively covering said surface of said substrate to form electrode windows respectively corresponding to said regions, each of said electrode windows exposing a part of the respective one of said regions;
• source and drain electrodes, each of which comprises a lower layer for preventing an alloy formation with said substrate and a metal layer thereon, said electrodes being formed to contact the source and drain regions through the respective electrode windows, each of said source and drain electrodes being electrically separated from said substrate by respective PN junctions that form between said source and drain regions and said substrate as a result of said different conductivity types;
• and
• a back gate electrode comprising said metal layer to make ohmic contact with said further region and to said substrate by a short circuit due to an alloy formation between said metal layer and said substrate, said metal layer and said substrate comprising materials providing for said alloy formation.