Signal-processing circuitry with intrinsic temperature insensitivity

A signal-processing device including a differential emitter-follower circuit comprising:

• first and second matched transistors having their collectors coupled to supply voltages;
• third and fourth matched transistors;
• the emitter of said first transistor being connected to the collector of said third transistor;
• the emitter of said second transistor being connected to the collector of said fourth transistor;
• means coupling the emitter of said first transistor to the base of said fourth transistor;
• means coupling the emitter of said second transistor to the base of said third transistor;
• output circuit means coupled to the emitters of said third and fourth transistors to develop an output voltage corresponding to the potential difference between those emitters;
• input circuit means for coupling an input voltage differentially between the bases of said first and second transistors;
• and
• first and second constant-current sources connected to the emitters of said third and fourth transistors and operable to maintain constant currents through the emitters of said third and fourth transistors and through the emitters of said first and second transistors.

A signal-processing device incorporating translinear circuitry comprising:

• (A) a first cross-quad circuit having:
• first and second matched PN junctions with input and output terminals;
• first current means supplying current to said junction input terminals;
• first and second matched transistors;
• the output terminal of said first junction being connected to the collector of said first transistor to supply the current of the first junction thereto;
• the output terminal of said second junction being connected to the collector of said second transistor to supply the current of the second junction thereto;
• means coupling the collector of said first transistor to the base of said second transistor;
• means coupling the collector of said second transistor to the base of said first transistor;
• means for applying an input signal to said first cross-quad circuit and for developing a differential output signal therefrom;
• (B) a second cross-quad circuit providing a differential emitter-follower and comprising:
• third and fourth matched transistors having their collectors coupled to supply voltage;
• means coupling said output voltage between the bases of said third and fourth transistors;
• fifth and sixth matched transistors;
• the emitter of said third transistor being connected to the collector of said fifth transistor;
• the emitter of said fourth transistor being connected to the collector of said sixth transistor;
• means coupling the emitter of said third transistor to the base of said sixth transistor;
• means coupling the emitter of said fourth transistor to the base of said fifth transistor;
• output circuit means coupled to the emitters of said fifth and sixth transistors to develop an output voltage corresponding to said output signal;
• and
• first and second constant-current sources connected to the emitters of said fifth and sixth transistors and operable to maintain constant currents through the emitters of said fifth and sixth transistors and thereby to maintain constant currents through the emitters of said third and fourth transistors.

A squarer comprising:

• (A) a cross-quad circuit including:
• first and second matched forward-biased PN junctions with input and output terminals;
• said input terminals being connected together;
• first current means supplying current to said junction input terminals;
• first and second matched transistors;
• the output terminal of said first junction being connected to the collector of said second transistor to supply the current of the second junction thereto;
• the output terminal of said second junction being connected to the collector of said second transistor to supply the current of the second junction thereto;
• means coupling the collector of said first transistor to the base of said second transistor;
• means coupling the collector of said second transistor to the base of said first transistor;
• means for applying an input signal to said cross-quad circuit and for developing a corresponding output signal at the input terminals of said junctions;
• and
• (B) a second circuit including:
• a third forward-biased PN junction having its input terminals coupled to the input terminals of said first and second junctions;
• second current means supplying current to said third junction;
• a fourth forward-biased PN junction having its input terminal connected to the output terminal of said third junction;
• third current means supplying current to said fourth junction;
• and
• means diverting a portion of the current from said third current means to provide an output current to a load element.

An active rectifier device comprising:

• first and second matched transistors having their collectors coupled to supply voltages;
• third and fourth matched transistors;
• the emitter of said first transistor being connected to the collector of said third transistor;
• the emitter of said second transistor being connected to the collector of said fourth transistor;
• means coupling the emitter of said first transistor to the base of said fourth transistor;
• means coupling the emitter of said second transistor to the base of said third transistor;
• input circuit means for coupling an input voltage differentially between the bases of said first and second transistors;
• a resistor connected between the emitters of said third and fourth transistors;
• a constant-current source connected to the emitter of said third transistor and operable to maintain a constant total current through the emitter of said third transistor and said resistor;
• the collector current of said second transistor serving as an output signal responsive to said input voltage.