Method for forming a narrow dimensioned region on a body
AssigneeInternational Business Machines Corporation
InventorHans B. Pogge
Life of this patent
Estimating the term…
Abstract
A method for forming a narrow dimensioned, for example, submicron, region on a silicon body that involves forming on the silicon body regions having substantially horizontal surfaces and substantially vertical surfaces. A layer of a very narrow dimension is formed both on the substantially horizontal and substantially vertical surfaces. Reactive ion etching is applied to the layer to substantially remove the horizontal layer while leaving the vertical layer substantially intact. The vertical layer dimension is adjusted depending upon the original thickness of the layer applied.
Claims19
A method for forming a narrow dimensioned region on a silicon body comprising:
- providing a silicon body;
- forming on said body regions having substantially a horizontal surface and substantially vertical surface;
- said substantially vertical surface is equal to or less than about 5.degree. from the vertical and having a uniformly positive slope wherein the uppermost intersection of said vertical surface with a major horizontal surface does not overhang the lowermost intersection of said vertical surface with a major horizontal surface;
- forming a layer on both said substantially horizontal surface and said substantially vertical surface;
- and
- reactive ion etching said layer to substantially remove said horizontal layer and to provide said narrow dimensioned region on said silicon body.
A method for forming integrated circuits having a narrow dimensioned region on a silicon body comprising:
- providing a silicon body;
- forming a first insulating layer on a major surface of said body;
- forming on said layer a polycrystalline silicon layer;
- forming an opening in said polycrystalline silicon layer by reactive ion etching which results in the structure having substantially a horizontal surface and a substantially vertical surface;
- said substantially vertical surface is equal to or less than about 5.degree. from the vertical and having a uniformly positive slope wherein the uppermost intersection of said vertical surface with a major horizontal surface does not overhang the lowermost intersection of said vertical surface with a major horizontal surface;
- forming a second insulating layer on both said substantially horizontal surface and said substantially vertical surface;
- and
- reactive ion etching said second insulating layer to substantially remove said horizontal layer and to provide said narrow dimensioned region on said silicon body.
The method of forming a dielectrically isolation integrated circuit comprising:
- providing a silicon body;
- reactive ion etching a pattern of depressions in said silicon body of at least two different widths which results in regions in said body having substantially a horizontal surface and a substantially vertical surface;
- said depressions surround monocrystalline silicon regions in said body;
- forming an insulating layer which fills the narrowest width depressions and forms a layer on both the remaining said substantially horizontal surface and said substantially vertical surfaces;
- reactive ion etching said layer to substantially remove said horizontal layer and to provide a narrow dimensioned region in the widest of said depressions in which the said silicon body is exposed;
- and
- depositing a conductive layer over said insulating layer and the exposed silicon in the said widest of said depressions so as to make electrical contact thereto.
Dependencies are inferred from the claim text.