US 4,249,180 A · Past dependent microcomputer cipher apparatus

Abstract

Apparatus for use in a secure data communication system includes a microcomputer that controls a cipher process by which sensitive data is encrypted before transmission. When activated, the apparatus accepts either cleartext or ciphertext and transforms the text to its opposite form according to an algorithm that is past dependent and which is also dependent on a pseudo random cipher key. Ciphertext may then be stored in an information retrieval system or transmitted to a destination terminal where the text is deciphered in real time by a corresponding second apparatus that stores the same key. In either case, security of transmitted and stored data is maintained since the sensitive data is in encrypted form. A set of logical instructions according to the algorithm is stored in a read only memory of the microcomputer which includes an EPROM unit having a data field of predetermined characters. The cipher process is initiated by a control character and starts with predetermined seeds that establish a first origin in the data field for each line of text to be encrypted. This origin is then translated to a second origin of the data field in response to four characters that are randomly generated by a counter. A variable sequence of iterative logical operations transforms cleartext to ciphertext and provides a key stream that is non-linear, random-like and which possesses an encryption period that is substantially longer than the period of any line so that the periodicity of the key stream is never indicated. The cipher keys for each line of text are temporarily stored in a read/write memory to permit editing operations and are erased at the onset of the next line.

Claims30

Dependent claims

A past dependent method for selectively encrypting and deciphering digitally encoded data characters in a microcomputer having a read only memory for storing data words and operational instructions, a read/write memory for storing data, a microprocessor adapted to process data characters input thereto in an orderly and logical manner responsive to retrieved instructions, and bus means communicating the microprocessor with its memories, an input port and an output port, the method comprising the steps of:

(A) selecting a first origin having a predetermined address in a data field of the read only memory;
(B) translating the first origin to a second origin of the read only memory in response to at least one randomly generated character;
(C) storing the contents of the second origin in a key register in the read/write memory;
(D) retrieving the contents of said key register and performing a first logical operation with a cipher key thereof on a first data character input at the input port to transform said character into one of, a corresponding encoded encrypted and deciphered character at the output port;
(E) performing a variable sequence of iterative logical operations on the cipher key to generate a new key for transforming a succeeding encoded data character input at the input port, the number of iterative steps being determined by the position of the data character with respect to one of, a predetermined previously input control character and a previous physical or logical data character line end, comprising
(a) locating a predetermined first address in the read only memory corresponding to a location key of the retrieved contents of said key register,
(b) incrementing the first address by a predetermined number to generate a second address in the read only memory, and
(c) retrieving the contents of the second address and performing said first logical operation thereon with the first data character to generate a first calculated character representing a third address in the read only memory, and;
(F) storing the new key in the read/write memory.

6 more elements

Microcomputer apparatus for selectively encrypting and deciphering digitally encoded data characters in a past dependent method, including a read only memory for storing data words and operational instructions, a read/write memory for storing data, a microprocessor adapted to process data characters input thereto in an orderly and logical manner, and bus means communicating the microprocessor with its memories, an input port and an output port, and comprising:

(A) means for selecting a first origin having a predetermined address in a data field of the read only memory;
(B) means for translating the first origin to a second origin of the read only memory in response to at least one randomly generated character;
(C) means for storing the contents of the second origin in a key register in the read/write memory;
(D) means for retrieving the contents of said key register and performing a first logical operation with a cipher key thereof on a first data character input at the input port to transform said character into one of, a corresponding encoded encrypted and deciphered character at the output port;
(E) means for performing a variable sequence of iterative logical operations on the cipher key to generate a new key for transforming a succeeding encoded data character input at the input port, the number of iterative steps being determined by the position of the data character with respect to one of, a predetermined previously input control character and a previous physical or logical data character line end, including means for
(a) locating a predetermined first address in the read only memory corresponding to a location key of the retrieved contents of said key register,
(b) incrementing the first address by a predetermined number to generate a second address in the read only memory, and
(c) retrieving the contents of the second address and performing said first logical operation thereon with the first data character to generate a first calculated character representing a third address in the read only memory, and;
(F) means for storing the new key in the read/write memory.

6 more elements

Dependencies are inferred from the claim text.

Past dependent microcomputer cipher apparatus

Life of this patent

Past dependent microcomputer cipher apparatus

Life of this patent

Abstract

Claims30