Leaky digital integrator
AssigneeRicoh Company, Ltd.
InventorD. Thomas Magill
Life of this patent
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AssigneeRicoh Company, Ltd.
InventorD. Thomas Magill
Estimating the term…
A leaky digital integrator comprising an accumulator circuit including an adder having first and second adder input terminals and an adder output terminal, and a shift register coupling the adder output terminal back to the second adder input terminal and to an integrator output terminal; a ternary signal detection circuit coupled to the integrator output terminal and operative to develop one of three decay factor signals depending upon whether the integrator output signal level is above, equal to or below a predetermined reference level; and switching apparatus having a first switched terminal which is periodically coupled at a first rate to the first adder input terminal to input update data signals to the accumulator circuit and a second switched terminal which is periodically coupled at a second rate to the first adder input terminal to input decay data signals to the accumulator circuit such that the circuit as a whole performs according to the equation a.sub.i (t)=Da.sub.i (t-1)+.DELTA.a.sub.i (t) where a.sub.i (t) is the integrator output at time t, D is the decay factor and .DELTA.a.sub.i (t) is the update increment.
An adaptive leaky integrator circuit comprising:
An adaptive leaky integrator circuit comprising:
In an equalizer means having a plurality of taps, means for correlating the taps with an input signal and for developing tap update signals commensurate therewith, and leaky integrator means for integrating each of said update signals and for developing tap coefficient signals for modifying the output of the equalizer, an improved leaky integrator circuit comprising:
Dependencies are inferred from the claim text.