US 4,245,302 AGranted

Computer and method for executing target instructions

AssigneeMagnuson Computer Systems, Inc.

InventorCarlton G. Amdahl

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Abstract

A microinstruction-controlled computer including a sequencer for controlling the sequencing of microinstructions. The computer executes target instructions by executing a number of microinstructions for each target instruction. Microinstructions are grouped in one or more microinstruction subroutines in a microstore. Microaddresses for addressing microinstructions and subroutines in the microstore are provided by a microaddress generator which includes a stack unit and other microaddress sources. The stack unit includes a stack memory and a link memory. The link memory stores, for each target instruction, a predetermined number of preloaded microaddresses where each such microaddress specifies the address of one of a number of subroutines employed to execute a particular target instruction. Sequential microaddresses in the link memory are accessed to link the subroutines employed in the execution of each target instruction.

Claims44

Dependent claims

A digital computer comprising,

a microstore for storing subroutines of microinstructions, said microinstructions accessable, when addressed by microaddress, for controlling said digital computer,
microaddress generation means for generating microaddresses for addressing said microstore to access microinstructions, said microaddress generation means including a link memory having locations for storing predetermined microaddresses for linking subroutines of microinstructions, including a stack memory having locations for storing microaddresses in connection with the execution of microinstructions, and including generation control means for controlling the accessing of microaddresses from said said link memory and said stack memory to address said microstore wherein said generation control means includes stack pointer means storing a stack pointer for pointing to locations in said stack memory and to an empty location;
includes pointer means for storing a link pointer pointing to locations in said link memory, said link pointer means including link counter means for storing said link pointer as a number and controlled to be counted each time a microaddress is accessed from said link memory, includes means for controlling the locations pointed to by said stack pointer means and said link pointer means, and includes selection means for selecting microaddresses from locations pointed to by said link pointer only when said stack pointer points to said empty location.

A digital computer comprising,

means for providing target instructions each having a unique op code
a microstore for storing subroutines of microinstructions, said microinstructions accessable, when addressed by microaddresses, for controlling said digital computer in the execution of target instructions,
microaddress generation means for generating microaddresses for addressing said microstore to access microinstructions, said microaddress generation means including a link memory having a different plurality of locations associated with each one of a number of target instructions where said locations store predetermined microaddresses for linking subroutines of microinstructions unique to each target instruction, including link pointer means for storing a link number pointing to a selected one of said plurlaity of locations where said link pointer means includes means for changing the link number each time a microaddress is accessed from said link memory, including means for using the op code from each target instruction with said link number to address each of said plurality of locations for each of said target instructions to obtain subroutines of microinstructions for executing each target instruction, and including generation control means for controlling the accessing of microaddresses from said link memory to address said microstore.

A digital computer for executing target instructions comprising,

a microstore for storing microinstructions, said microinstructions accessable from said microstore, when addressed by microaddresses, for controlling said digital computer,
means responsive to microinstructions accessed from said microstore for performing data manipulations under control of said microinstructions,
microaddress generation means for sequentially generating microaddresses for addressing said microstore to access sequentially microinstructions from said microstore, said microaddress generation means comprising,
a stack unit including a link memory for storing groups of predetermined microaddresses each of said groups of predetermined microaddresses specifying a corresponding predetermined group of microinstructions to be linked and sequentially executed for each target instruction, each of said predetermined microaddresses in a group located in sequential locations, including a stack memory for storing and fetching microaddresses during the execution of said predetermined group of microinstructions, including a top-of-stack register for storing a microaddress from said stack memory or said link memory, and including stack control means for controlling the selection of microaddresses for said top-of-stack register independent of the execution of microinstructions,
an additional microaddress source unit,
generation control means for controlling the accessing of microaddresses from said stack unit and from said additional microaddress source unit.

3 more elements

Dependencies are inferred from the claim text.