Low speed limiter unit for internal combustion engine ignition systems

A low speed limiter unit for a solid state ignition system for a two-cycle internal combustion engine, containing an electronic advance means adapted to be driven fully on or fully off to automatically advance the spark angle and timing with a step-like characteristic of spark angle vs. engine speed, sensing means for sensing the engine speed and generating a plurality of pulses for each revolution of the engine, and speed switch means designed to receive and respond to said pulses and effectively control said electronic advance means to actuate said advance means in response to the frequency of said pulses dropping below that selected pulse frequency which is associated with the selected low limit engine speed, said speed sensing menas being provided with an input signal containing a plurality of voltage waves for each complete firing sequency of the engine, a shaping circuit being connected to receive said voltage waves and to generate for each individual voltage wave a generally rectangular pulse, said speed switch means including a restartable timing circuit means followed by a control switch means being connected to said shaping circuit for producing a first logic output condition above said selected pulse frequency and a second logic output condition below said selected pulse frequency, with said timing circuit means determining said first or second logic output conditions, respectively, of said switch means to drive said electronic advance means.

A low speed limiter unit for a solid state ignition system for a two-cycle internal combustion engine wherein the ignition system is driven from an alternator having a stator winding producing output voltage of a speed-related frequency, containing an electronic advance means adapted to be driven fully on or fully off to automatically advance the spark angle or timing with a step-like characteristic of spark angle vs. engine speed, sensing means for sensing the engine speed and generating a plurality of pulses for each revolution of the engine, and speed switch means designed to receive and respond to said pulses and effectively control said electronic advance means to actuate said advance means in response to the frequency of said pulses dropping below that selected pulse frequency which is associated with the selected low limit engine speed, said speed sensing means including a shaping circuit connected to said stator winding and producing a series of pulses having a frequency related to the frequency of said output voltage, said speed sensing means further includes a retriggerable timing unit having an input connected to said shaping circuit and having an output which remains at a first logic level when the frequency of said series of pulses is above a selected frequency and which switches between said first logic level and a second logic level when the frequency of said series of pulses is below said selected frequency, said speed switch means includes a gated latch means having inputs connected to said timing unit and to said shaping circuit to produce an essentially wholly off or wholly on output state in response to the inputs, said latch means being connected to actuate said advance means.

In a capacitor discharge ignition system having an alternator for charging the discharge capacitor means and having a triggered thyristor means for discharging said discharge capacitor means and an ignition trigger signal source plus a reverse bias capacitor means connected to operate said thyristor means and establishing over the operating speed range of the engine an essentially constant ignition angle characteristic in the assumed absence of angular relocation of the ignition trigger signal source, a low speed limiter comprised of a signal shaping circuit connected to said alternator and producing a series of pulse signals for each complete firing sequency of the engine, the frequency of said pulse signals being directly related to the speed of the engine, said shaping circuit establishing a generally square wave pulse signal having a generally non-zero average value, a triggered solid state pulse source means for generating a short rectangular pulse signal of selected constant period for each said square wave pulse signal, a retriggerable timer including gated logic elements and time constant means connected to said triggered solid state means, a two input switch possessing memory with its first input connected to said triggered solid state means and its second input connected to said retriggerable timer, said two input switch being responsive to the logic level of the signal at its second input during the said short rectangular pulse generated by said triggered solid state means connected to its first input and operating solely on memory at all other times, said switch switching wholly on when the frequency of said pulses from said signal shaping circuit is below a selected frequency, and said switch switching wholly off when the frequency of said pulses from said signal shaping circuit is above said selected frequency, and a voltage controlled load conntected to said switch and to said reverse bias capacitor means and operable to reduce the voltage on the capacitor and thereby advance the ignition angle characteristic, said limiter therefore being active below a selected speed associated with said selected frequency, and inactive above said selected speed.