Circuit arrangement for receiving simplex and duplex current telegraph characters
AssigneeSiemens Aktiengesellschaft
InventorDieter Giersberg
Life of this patent
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AssigneeSiemens Aktiengesellschaft
InventorDieter Giersberg
Estimating the term…
A circuit arrangement for receiving simplex current and duplex current telegraph characters utilizes a series resistance in each of a plurality of telegraph lines. An operational amplifier is connected via switches to read the voltage drop across the line resistances and to signal such line conditions to an output circuit. The output circuit comprises a first differentiating circuit which passes the line conditions onto a bistable flip-flop, a monostable flip-flop operated by the first differentiating circuit to provide a timed trigger to a second differentiating circuit which triggers the bistable flip-flop into a condition indicative of the condition of the telegraph line being read.
A circuit arrangement for receiving single-current and double-current telegraph characters, comprising:
Dependencies are inferred from the claim text.
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Details ; arrangements for supplying electrical power along data transmission lines: dC level restoring means; Bias distortion correction ;…
Discriminating pulses: suppression or limitation of noise or interference
Digital communication
Pulse technique
Term ended 15 Feb 1999 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
1. Field of the Invention
The present invention relates to a circuit arrangement for receiving telegraphic characters, and more particularly to such an arrangement which may be used for simplex operation and duplex operation.
2. Description of the Prior Art
Other objects, features and advantages of the invention, its organization, construction and operation will be best understood from the following detailed description, taken in conjunction with the accompanying drawings, on which:
FIG. 1 is a schematic circuit representation of the construction of a receiver circuit constructed in accordance with the present invention;
FIG. 2 is a schematic circuit diagram of the input circuit of the receiver circuit illustrated in FIG. 1;
The construction and method of operation of the circuit arrangement of the present invention will be explained in the following on the basis of FIG. 1. The receiver circuit E, illustrated in FIG. 1, comprises an input circuit ES and an output circuit AS and can be connected to telegraph lines L by way of a switching installation S which contains four switching arms S1-S4 in this particular illustration. Telegraph lines L can be subscriber lines or junction lines. By way of the switching installation S and a twelve-wire connection line AL, the receiver circuit E can be connected to a transmission line SL and a receiving line EL in such a manner that there is supplied to the inputs of the output circuit AS a voltage which, when current flows in the line SL and the receive line EL, provides voltage drops across the resistances Rm. In the example illustrated in FIG. 1, measuring resistances Rm serve this purpose. The voltage drop across the measuring resistance is supplied to the respective amplifier elements, which in this example are provided as operational amplifiers OP1 and OP2 within the input circuit ES which are respectively provided for the transmission direction and the receiving direction. The operational amplifiers OP1 and OP2 have a separate current supply W. A pair of optical couplers OK1 and OK2 are provided at the output of respective operational amplifiers OP1 and OP2. Dependent upon the stop polarity or the start polarity on the lines SL1 and EL1, the output transistors of the optical couplers OK1 and OK2 become conductive or blocked. A signal emitted in this manner from the input circuit ES is differentiated in a first differentiating circuit DG1 of the output circuit AS and is utilized as a trigger pulse for a monostable flip-flop MK. The flip time of the monostable flip-flop MK is adjustable and corresponds, in the example considered here, to half the pulse length of the characters transmitted over the telegraph lines SL1 and EL1. A second differentiating circuit DG2 is connected to the output of the monostable flip-flop MK and produces a trigger pulse for a bistable flip-flop BK when the monostable flip-flop returns to its stable condition subsequent to its flip. The information corresponding to a stop polarity character element or a start polarity character element is, therefore, in each instance transferred from the first differentiating circuit G1 into the bistable flip-flop BK. It is thereby achieved that each polarity reversal on the telegraph line being monitored in the transmission direction and in the receiving direction, in the example under consideration, is transferred, delayed by one half pulse length, from the input of the receiver circuit E into the bistable flip-flop BK. Distortions which occur due to transient phenomena, above all, on simplex lines are therefore eliminated. The adaptation of the system to different telegraph speeds can be achieved in a simple manner by changing the flip time of the monostable flip-flop MK.
The construction of the input circuit ES and its connection to a telegraph line is illustrated in FIG. 2. The connection is established by way of the previously-described switching installation S with the switching arms S1-S4, here connected by way of a plug connection to the test plug connector strip TA of the transmission line or subscriber line set and, by way of the latter, is in turn connected to the measuring resistances Rm in the transmission line SL1 and in the receiving line EL1. The current supply SV for the operational amplifier OP1 and OP2 in the input circuit ES, arranged in the upper part of FIG. 2, and which may be constructed in a manner that is well known per se, contains essentially a transformer W and additional circuit elements which are not further described herein. The voltage drop at the resistance Rm disposed in the transmission line SL1 is, in the example of FIG. 2, supplied by way of the switching arms S1 and S2 to the non-inverting input 2 of the operational amplifier OP1, on the one hand, and via a RC network, to the inverting input 3 of the operational amplifier OP1, on the other hand. At the non-inverting input 2 of the operational amplifier OP1, the zero potential of the supply voltage is also connected. A reference voltage is therefore set at the connection point of a resistor R1 and a capacitor C1 which is always positive if a stop-polarity current flows through the resistance Rm; which is always negative if a start-polarity current flows through the resistance RM; and which is 0 volt when, in the case of simplex operation, the start-polarity condition occurs on the telegraph line and the latter is therefore without current. A positive reference voltage at the connection point of the capacitor C1 and the resistor R1 effects the occurrence of an amplified negative voltage at the output 5 of the operational amplifier OP1. A current therefore flows through the diode of the optical coupler OK1 which is effective to render the output transistor conductive. If the reference voltage at the connection point of the capacitor C1 and the resistor R1 is negative, 0 volt is likewise applied to the output 5 of the operational amplifier OP1, and the output transistor of the optical coupler OK1 remains blocked. The described operations apply in the manner with respect to the operational amplifier OP2 to which the voltage drop at the resistance Rm in the receiving line EL1 is supplied by way of the switching arms S3 and S4. In this case, the optical coupler OK2 is operated in such a manner that its output transistor, in the case of stop-polarity pulses on a receiving line EL1 is conductive, and, in the case of start-polarity pulses on the receiving line EL1, is blocked. The serially-connected capacitors at the inputs of the operational amplifier OP1 and OP2 act as differentiating circuits which make it possible, even in the case of strongly slurred pulse slopes, to recognize the pulse starts sufficiently early that virtually no inherent distortion results. The capacitors C3 and C4, which are connected in parallel with respective degenerative feedback resistors R3 and R4, function as integrated circuits which cause a reduction in sensitivity of the operational amplifiers OP1 and OP2 relative to the negative interference pulses at the input of the input circuit ES. A pair of diodes D1 and D2 limit the input voltage for the operational amplifier OP1, while another pair of diodes D3 and D4 serve the same purpose with respect to the operational amplifier OP2. The output signals of the optical couplers OK1 and OK2 are available at respective points A and B.
FIG. 3 illustrates the construction of the output circuit AS. In the description of the method of operation, reference is simultaneously made to the voltage and pulse diagram for simplex operation illustrated in FIG. 5. The condition of the circuit will be first described which exists on the telegraph lines during an idle condition. This is characterized by the start polarity on the transmission line as well as on the receiving line. As has been explained on the basis of FIG. 2, the output transistors of the optical couplers OK1 and OK2 are blocked. In the output circuit AS, a pair of transistors T1 and T2 are therefore blocked by way of the circuit points A and B, whereas a pair of transistors T3 and T4, and an additional transistor T5, are conductive. The bistable flip-flop BK is in a condition which characterizes the start-polarity condition on the telegraph line. A capacitor C5 is charged to the voltage value determined by the voltage divider which comprises a pair of resistors R6 and R7, via the conductive transistor T4. As a consequence of the blocked transistor T2, the capacitor C6 is charged to a voltage value determined by the voltage divider circuits which comprise the resistors R6 and R7 as well as the resistors R10 and R11.