US 4,231,820 AGranted

Method of making a silicon diode array target

AssigneeRCA Corporation

InventorWilliam N. Henry

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Abstract

A novel process is disclosed in which an insulating layer is formed on a N type semiconductor substrate and an array of apertures is formed through the insulating layer to expose the substrate. A film of substantially intrinsic polycrystalline silicon is deposited over the insulating layer and the exposed substrate surfaces. A masking layer having a plurality of interconnecting members is formed photolithographically on the film, the members defining an array of openings in substantial registration with the apertures. A P type doping element, such as boron, is diffused laterally into the intrinsic film beneath each masking member and is simultaneously diffused into the substrate to form a plurality of PN junctions. The lateral diffusion is controlled so that the undoped regions underlying each of the masking elements have a width less than the width of the masking elements. The masking layer is removed and the undoped regions are selectively etched to form an array of doped silicon pads that are separated by a relatively small spacing.

Claims13

Dependent claims

In a method of making a silicon diode array target of the type wherein an insulating layer is deposited on a semiconductor substrate of a first conductivity type and an array of apertures is formed through said layer exposing said substrate, wherein the improvement comprises the steps of:

(a) depositing a film of substantially intrinsic polycrystalline silicon over said insulating layer and the exposed substrate in said openings;
(b) forming photolithographically on said film a masking layer having a plurality of interconnecting members defining an array of openings in substantial register with said apertures and exposing said intrinsic film, each of said elements being formed to have a predetermined width;
(c) diffusing through said openings a second conductivity type doping element laterally into a portion of said intrinsic film underlying an edge portion of each of said masking members, so that the width of the undoped intrinsic film underlying each of said masking members is less than the predetermined width;
(d) simultaneously driving said doping element through the intrinsic film deposited in said opening into said substrate to form an array of PN junctions therein;
(e) removing said masking layer;
and
(f) selectively etching away the undoped intrinsic film to form an array of doped polycrystalline silicon pads separated by the width of the removed undoped intrinsic film.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 06/013,120Filed 21 Feb 1979
Granted: 4 Nov 1980
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10P 32/302
Diffusion for doping of conductive or resistive layers: doping polycrystalline silicon or amorphous silicon layers
H10P 32/1414
From or through or into an external applied layer, e.g. photoresist or nitride layers: the applied layer being silicon, silicide or SIPOS, e.g.…
H10P 32/171
Characterised by the semiconductor material: being group IV material
H10P 76/40
Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography: of masks comprising inorganic materials