Semiconductor integrated circuit device

A semiconductor integrated circuit device having an array of integrated injection logic memory cells, each said memory cell comprising first and second transistors having common emitters of a first conduction type and comprising an injector of the cell, third and fourth transistors having emitters of a second conduction type opposite to said first conduction type with their collectors respectively connected to the collectors of said first and second transistors, said third transistor having its base connected to the collector of said fourth transistor and said fourth transistor having its base connected to the collector of said third transistor, said first and second transistors having bases connected in common and to the emitters of said third and fourth transistors, and first and second word lines along respective lines of said array, each said first word line being connected to said injectors of the cells of the respective line of the array and each said second word line being similarly connected to the bases of said first and second transistors, said semiconductor integrated circuit device comprising

• each said second word line comprising a semiconductor bulk portion,
• dummy cells distributed in each said line of said memory cell array, each of said dummy cells comprising a shunt circuit for shunting a respective portion of a write current supplied to selected ones of said integrated injection logic memory cells of the respective line of cells, each of said shunt circuits comprising an injector, and a hold current supply transistor for selectively supplying a hold current to said memory cells of said respective line of cells.