Frame synchronizer having a write-inhibit circuit
AssigneeNippon Electric Co., Ltd.
InventorsYutaka Ito, Yuzo Inoue, Takao Shimizu, Masao Inaba, Atsumi Sugimoto, Takeo Emori
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Abstract
A frame synchronizer for a television receiver in which the incoming television signal is digitized and stored in a memory, includes a circuit for generating a write-inhibit control signal for inhibiting the write-in of a digitized second television signal into the memory between the switchover from a first television signal to the second television signal and the beginning of a complete frame of the second television signal.
Claims5
A frame synchronizer including means for digitizing an input television signal, a memory for storing the digitized television signal, write-in address generator means for generating address signals to write the digitized television signal in said memory in accordance with a scanning sequence of the input television signal, read-out address generator means for generating address signals to read the digitized television signal out of said memory in accordance with a reference signal, means for converting the signal read out of said memory into an analog signal, and means for producing a write-inhibit signal to inhibit the write-in of said digitized television signal into said memory, said write-inhibit signal producing means comprising
- first means responsive to one of the synchronizing pulses contained in said input television signal for generating a first pulse disposed at a time position before the time position of the synchronizing pulse immediately following said one synchronizing pulse;
- a flip-flop adapted to be set by the leading edge of said first pulse and to be reset by said synchronizing pulses of said input television signal;
- second means responsive to the trailing edge of said first pulse for generating a second pulse having a narrower pulse width than said first pulse;
- and
- third means responsive to said second pulse and said set state of said flip-flop for providing an output as said write-inhibit signal.
A frame synchronizer including means for digitizing an input television signal, a memory for storing the digitized television signal, means for generating address signals to write the digitized television signal in said memory in accordance with a scanning sequence of the input television signal, means for generating address signals to read the digitized television signal out of said memory in accordance with a reference signal, and means for converting the signal read out of said memory into an analog signal, a write-inhibit control circuit for producing a write-inhibit signal to inhibit the write-in of said digitized television signal in said memory, said write-inhibit control circuit comprising
- means for generating a first pulse having a predetermined pulse width when the address signal generated by said write-in address generator means designates a predetermined address;
- means responsive to a synchronizing signal contained in said input television signal for generating a second pulse having a predetermined pulse width;
- and
- means responsive to said first pulse and said second pulse for providing a pulse output as said write-inhibit signal.
A frame synchronizer including means for digitizing an input television signal, a memory for storing the digitized television signal, means for generating address signals to write the digitized television signal in said memory in accordance with a scanning sequence of the input television signal, means for generating address signals to read the digitized television signal out of said memory in accordance with a reference signal, means for converting the signal read out of said memory into an analog signal, and means for producing a write-inhibit signal to inhibit the write-in of said digitized television signal in said memory, said write-inhibit signal producing means comprising,
- means for producing a first control signal upon the detection of nonsynchronous switching in response to a horizontal synchronizing signal contained in said input television signal,
- means for producing a second control signal upon the detection of nonsynchronous switching in response to a vertical synchronizing signal contained in said input television signal, and
- gating means for applying one of said first and second control signals to said memory as said write-inhibit control signal.
Dependencies are inferred from the claim text.